Adaptive matched filter and vector correlator for a code division multiple access (CDMA) modem

ABSTRACT

A CDMA modem includes a modem transmitter having: a code generator which provides an associated pilot code signal and which generates a plurality of message code signals: a spreading circuit which produces a spread-spectrum message signal by combining each of the information signals with a respective one of the message code signals; and a global pilot code generator that provides a global pilot code signal to which the message code signals are synchronized. The CDMA modem also includes a modem receiver having an associated pilot code generator and a group of associated pilot code correlators for correlating code-phase delayed versions of the associated pilot signal with a receive CDM signal to produce a despread associated pilot signal. The code phase of the associated pilot signal is changed responsive to an acquisition signal value until a pilot signal is received. The associated pilot code tracking logic adjusts the associated pilot code signal in phase responsive to the acquisition signal so that the signal power level of the despread associated pilot code signal is maximized. Finally, the CDMA modem receiver includes a group of message signal acquisition circuits, each including a plurality of receive message signal correlators which correlate respective local received message code signal to the CDM signal to produce a respective despread received message signal.

This is a divisional application of prior application Ser. No.08/669,769, now U.S. Pat. No. 5,796,776, filed on Jun. 27, 1996,entitled CODE SEQUENCE GENERATOR IN A CDMA MODEM.

This application claims the benefit of U.S. Provisional application Ser.No. 60/000,775 filed Jun. 30, 1995.

BACKGROUND OF THE INVENTION

Providing quality telecommunication services to user groups which areclassified as remote, such as rural telephone systems and telephonesystems in underdeveloped countries, has proved to be a challenge overrecent years. The past needs created by these services have beenpartially satisfied by wireless radio services, such as fixed or mobilefrequency division multiplex (FDM), frequency division multiple access(FDMA), time division multiplex (TDM), time division multiple access(TDMA) systems, combination frequency and time division systems(FD/TDMA), and other land mobile radio systems. Often, these remoteservices are faced with more potential users than can be supportedsimultaneously by their frequency or spectral bandwidth capacity.

Recognizing these limitations, recent advances in wirelesscommunications have used spread spectrum modulation techniques toprovide simultaneous communication by multiple users. Spread spectrummodulation refers to modulating a information signal with a spreadingcode signal; the spreading code signal being generated by a codegenerator where the period Tc of the spreading code is substantiallyless than the period of the information data bit or symbol signal. Thecode may modulate the carrier frequency upon which the information hasbeen sent, called frequency-hopped spreading, or may directly modulatethe signal by multiplying the spreading code with the information datasignal, called direct-sequence spreading (DS). Spread-spectrummodulation produces a signal with bandwidth substantially greater thanthat required to transmit the information signal, and synchronousreception and despreading of the signal at the receiver demodulatorrecovers the original information. The synchronous demodulator uses areference signal to synchronize the despreading circuits to the inputspread-spectrum modulated signal in order to recover the carrier andinformation signals. The reference signal can be a spreading code whichis not modulated by an information signal. Such use of a synchronousspread-spectrum modulation and demodulation for wireless communicationis described in U.S. Pat. No. 5,228,056 entitled SYNCHRONOUSSPREAD-SPECTRUM COMMUNICATIONS SYSTEM AND METHOD by Donald L. Schilling,which is incorporated herein by reference.

Spread-spectrum modulation in wireless networks offers many advantagesbecause multiple users may use the same frequency band with minimalinterference to each user's receiver. Spread-spectrum modulation alsoreduces effects from other sources of interference. In addition,synchronous spread-spectrum modulation and demodulation techniques maybe expanded by providing multiple message channels for a user, eachspread with a different spreading code, while still transmitting only asingle reference signal to the user. Such use of multiple messagechannels modulated by a family of spreading codes synchronized to apilot spreading codes for wireless communication is described in U.S.Pat. No. 5,166,951 entitled HIGH CAPACITY SPREAD-SPECTRUM CHANNEL byDonald L. Schilling, which is incorporated herein by reference.

One area in which spread-spectrum techniques are used is in the field ofmobile cellular communications to provide personal communicationservices (PCS). Such systems desirably support large numbers of users,control Doppler shift and fade, and provide high speed digital datasignals with low bit error rates. These systems employ a family ororthogonal or quasi-orthogonal spreading codes, with a pilot spreadingcode sequence synchronized to the family of codes. Each user is assignedone of the spreading codes as a spreading function. Related problems ofsuch a system are: supporting a large number of users with theorthogonal codes, handling reduced power available to remote units, andhandling multipath fading effects. Solutions to such problems includeusing phased-array antennas to generate multiple steerable beams, usingvery long orthogonal or quasi-orthogonal code sequences which are reusedby cyclic shifting of the code synchronized to a central reference, anddiversity combining of multipath signals. Such problems associated withspread spectrum communications, and methods to increase capacity of amultiple access, spread-spectrum system are described in U.S. Pat. No.4,901,307 entitled SPREAD SPECTRUM MULTIPLE ACCESS COMMUNICATION SYSTEMUSING SATELLITE OR TERRESTRIAL REPEATERS by Gilhousen et al. which isincorporated herein by reference.

SUMMARY OF THE INVENTION

An exemplary system which includes a modem according to the presentinvention provides local-loop telephone service using radio link betweenone or more base stations and multiple remote subscriber units. In theexemplary embodiment, the radio link is described for a base stationcommunicating with a fixed subscriber unit (FSU), but the system isequally applicable to systems including multiple base stations withradio links to both FSUs and Mobile Subscriber Units (MSUs).Consequently, the remote subscriber units are referred to herein asSubscriber Units (SUs). Referring to FIG. 1, in the exemplary system,the Base Station (BS) 101 provides call connection to the local exchange(LE) 103 or other and telephone network switching interface, andincludes the Radio Carrier Station RCS (104). One or more RCSs 104, 105,110 connect to the Radio Distribution Unit (RDU) 102 through the links131, 132, 137, 138, 139, and the RDU 102 in turn interfaces with the LE103 by transmitting and receiving call set-up, control, and informationsignals through telco links 141, 142, 150. The SUs 116, 119 communicatewith the RCS 104 through radio links 161, 162, 163, 164, 165. Both theRCS and the SUs include CDMA modems which establish and maintain theradio links. Alternatively, another embodiment of the invention mayinclude several SUs and a "master" SU which functions in much the samewas as the RCS to allow communication among the SUs. Such embodiment mayor may not have connection to a local telephone network.

Although the described embodiment uses different spread-spectrumbandwidths centered around a carrier for the transmit and receivespread-spectrum channels, the present method is readily extended tosystems using multiple spread-spectrum bandwidths for the transmitchannels and multiple spread-spectrum bandwidths for the receivechannels. Alternatively, because spread-spectrum communication systemshave the inherent feature that one user's transmission appears as noiseto another user's despreading receiver, an embodiment can employ thesame spread-spectrum channel for both the transmit and receive pathchannels. In other words, Uplink and Downlink transmissions can occupythe same frequency band.

The spread binary symbol information is transmitted over the radio links161 to 165 using Quadrature Phase Shift Keying (QPSK) modulation withNyquist Pulse Shaping in the present embodiment, although othermodulation techniques may be used, including, but not limited to, OffsetQPSK (OQPSK) and Minimum Shift Keying (MSK).

The RCS and the SUs each contain CDMA modems according to the presentinvention for transmission and reception of telecommunication signalsincluding information signals and connection control signals. A CDMAmodem which includes an embodiment of the present invention includes amodem transmitter having: a code generator which provides an associatedpilot code signal and which generates a plurality of message codesignals; a spreading circuit which combines each of the informationsignals, with a respective one of the message code signals to generate aspread-spectrum processed message signal; and a global pilot codegenerator that provides a global pilot code signal to which the messagecode signals are synchronized.

The exemplary CDMA modem also includes a model receiver havingassociated pilot code acquisition and tracking logic. The associatedpilot code acquisition logic includes an associated pilot code generatorand a group of associated pilot code correlators for correlatingcode-phase delayed versions of the associated pilot signal with areceive CDM signal to produce a despread associated pilot signal. Thecode phase of the associated pilot signal is changed responsive to anacquisition signal value until a detector indicates the presence of thedespread associated pilot code signal by changing the value of theacquisition signal. The associated pilot code signal is synchronized tothe global pilot signal. The associated pilot code tracking logicadjusts the associated pilot code signal in phase responsive to theacquisition signal so that the signal power level of the despreadassociated pilot code signal is maximized. Finally, the CDMA modemreceiver includes a group of message signal acquisition circuits. Eachmessage signal acquisition circuit includes a plurality of receivemessage signal correlators which correlate the local received messagecode signal with the CDM signal to produce a respective despreadreceived message signal.

To generate large families of nearly mutually orthogonal codes used bythe CDMA modems, the exemplary modem includes a code sequence generator.The code sequences are assigned to a respective logical channel of thespread-spectrum communication system, which includes In-phase (I) andQuadrature (Q) transmission over RF communication channels. One set ofsequences is used as pilot sequences that are transmitted without beingmodulated by a data signal. The code sequence generator circuit includesa long code sequence generator including a linear feedback shiftregister, a memory which provides a short, even code sequence, and aplurality of cyclic shift, feedforward sections, each of which providesa respective code sequence in the family of code sequences. The codesequence generator further includes a group of code sequence combinersfor combining each generated code sequence with the short, even codesequence to produce a group, or family, of long code sequences havingrelatively low mutual correlation.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of a code division multiple accesscommunication system according to the present invention.

FIG. 2a is a block diagram of a 36 stage linear shift register suitablefor use with long spreading-code of the code generator of the presentinvention.

FIG. 2b is a block diagram of circuitry which illustrates thefeed-forward operation of the code generator.

FIG. 2c is a block diagram of an exemplary code generator of the presentinvention including the circuit for generating spreading-code sequencesfrom the long spreading-code and the short spreading-codes.

FIG. 2d is an alternate embodiment of the code generator circuitincluding delays to compensate for electrical circuit delays.

FIG. 3a is a graph of the constellation points of the pilotspreading-code QPSK signal.

FIG. 3b is a graph of the constellation points of the message channelQPSK signal.

FIG. 3c is a block diagram of exemplary circuitry which implements themethod of tracking the received spreading-code phase of the presentinvention.

FIG. 4 is a block diagram of the tracking circuit that tracks the medianof the received multipath signal components.

FIG. 5a is a block diagram of the tracking circuit that tracks thecentroid of the received multipath signal components.

FIG. 5b is a block digram of the Adaptive Vector Correlator.

FIG. 6 is a block diagram of exemplary circuitry which implements theacquisition decision method of the correct spreading-code phase of thereceived pilot code of the present invention.

FIG. 7 is a block diagram of an exemplary pilot rake filter whichincludes the tracking circuit and digital phase locked loop fordespreading the pilot spreading-code, and generator of the derotationfactors of the present invention.

FIG. 8a is a block diagram of an exemplary adaptive vector correlatorand matched filter for despreading and combining the multipathcomponents of the present invention.

FIG. 8b is a block diagram of an alternative implementation of theadaptive vector correlator and adaptive matched filter for despreadingand combining the multipath components of the present invention.

FIG. 8c is a block diagram of an alternative embodiment of the adaptivevector correlator and adaptive matched filter for despreading andcombining the multipath components of the present invention.

FIG. 8d is a block diagram of the Adaptive Matched Filter of oneembodiment of the present invention.

FIG. 9 is a block diagram of the elements of an exemplary radio carrierstation (RCS) of the present invention.

FIG. 10 is a block diagram of the elements of an exemplary modeminterface unit (MIU) of the RCS shown in FIG. 9.

FIG. 11 is a high level block diagram showing the transmit, receive,control, and code generation circuitry of the CDMA modem.

FIG. 12 is a block diagram of the transmit section of the CDMA modem.

FIG. 13 is a block diagram of an exemplary modem input signal receiver.

FIG. 14 is a block diagram of an exemplary convolutional encoder as usedin the present invention.

FIG. 15 is a block diagram of the receive section of the CDMA modem.

FIG. 16 is a block diagram of an exemplary adaptive matched filter asused in the CDMA modem receive section.

FIG. 17 is a block diagram of an exemplary pilot rake as used in theCDMA modem receive section.

FIG. 18 is a block diagram of an exemplary auxiliary pilot rake as usedin the CDMA modem receive section.

DESCRIPTION OF THE EXEMPLARY EMBODIMENT

Referring to FIG. 1, the radio links 161 to 165 incorporate BroadbandCode Division Multiple Access (B-CDMA™) as the mode of transmission inboth the Uplink and Downlink directions. CDMA (also known as SpreadSpectrum) communication techniques used in multiple access systems arewell-known, and are described in U.S. Pat. No. 5,228,056 entitledSYNCHRONOUS SPREAD-SPECTRUM COMMUNICATION SYSTEM AND METHOD by Donald T.Schilling which is incorporated herein by reference. The describedexemplary system uses the Direct Sequence (DS) spreading technique. Ineach modem, one or more CDMA modulators performs the spread-spectrumspreading code sequence generation. In addition, the modems generate,for example, a pseudonoise (PN) spreading sequence; and perform complexDS modulation to produce quadrature phase shift keying (QPSK) signalsfor the In-phase (I) and Quadrature (Q) channels. Pilot signals aregenerated and transmitted with the modulated signals. The pilot signalsof the present embodiment are spreading codes which are not modulated bydata. The pilot signals are used for system synchronization, carrierphase recovery, and for estimating the impulse response of the radiochannel. Each SU includes a single pilot generator and at least one CDMAmodulator and demodulator, called a CDMA modem. Each RCS 104, 105, 110has a single pilot generator plus sufficient CDMA modulators anddemodulators for all the logical channels in use by all SUs.

The CDMA demodulator despreads the signal, with appropriate processingto combat or exploit multipath propagation effects. Parametersconcerning the received power level are used to generate the AutomaticPower Control (APC) information which, in turn, is transmitted to theother end (i.e. from the SU to the RCS or from the RCS to the SU). TheAPC information is used to control transmit power of the automaticforward power control (AFPC) and automatic reverse power control (ARPC)links. In addition, each RCS 104, 105 and 110 may perform MaintenancePower Control (MPC), in a manner similar to APC, to adjust the initialtransmit power of each SU 111, 112, 115, 117 and 118.

Diversity combining at the radio antennas of the RCS 104, 105 and 110 isnot necessary because CDMA has inherent frequency diversity due to thespread bandwidth. Receivers may include Adaptive Matched Filters (AMFs)(not shown in FIG. 1), however, which combine the multipath signals. Inthe exemplary embodiment, AMFs perform Maximal Ratio Combining.

Logical Communication Channels

A `channel` of the prior art is usually regarded as a communicationspath which is part of an interface and which can be distinguished fromother paths of that interface without regard to its content. In the caseof CDMA, however, separate communications paths are distinguished onlyby their content. The term `logical channel` is used to distinguish theseparate data streams, which are logically equivalent to channels in theconventional sense. All logical channels and sub-channels of the presentinvention are mapped to a common 64 kilo-symbols per second (ksym/s)QPSK stream. Some channels are synchronized to associated pilot codeswhich are generated in the same way and perform much the same functionas the system Global Pilot Code. The system pilot signals are not,however, considered logical channels.

Several logical communication channels are used over the RFcommunication link between the RCS and SU. Each logical communicationchannel has either a fixed, pre-determined spreading code or adynamically assigned spreading code. For both pre-determined andassigned codes, the code phase is in synchronism with the Pilot Code.Logical communication channels are divided into two groups: the GlobalChannel (GC) group includes those channels which are either transmittedfrom the base station RCS to all the remote SUs or from any SU to theRCS of the base station regardless of the SU's identity. These channelscontain for all users and include the channels used by SUs to gainaccess to message communication channels. Channels in the AssignedChannels (AC) group are those channels which are dedicated tocommunication between the RCS and a particular SU.

The Global Channels (GC) group provides for 1) Broadcast logicalchannels, which provide point to multipoint services for broadcastingmessages to all SUs and paging messages to SUs; and 2) Access Controllogical channels which provide point-to-point services on globalchannels for SUs to access the system and obtain assigned channels.

An Assigned Channel (AC) group contains the logical channels thatcontrol a single telecommunication connection between the RCS and a SU.The functions developed when an AC group is formed consists of a pair ofpower control logical message channels for each of the Uplink andDownlink connections, and depending on the type of connection, one ormore pairs of traffic channels. The Bearer Control function performs therequired forward error control, bearer rate modification, and encryptionfunctions. The logical channels which constitute the BC and AC groupsare summarized below in Table 1.

                                      TABLE 1                                     __________________________________________________________________________    Logical Channels and sub-channels of the B-CDMA Air Interface                                 Direction                                                                     (forward                                                      Channel  Brief  or   Bit                                                                              Max Power                                             name Abbr.                                                                             Description                                                                          reverse)                                                                           rate                                                                             BER level                                                                              Pilot                                        __________________________________________________________________________    Global Channels                                                               Fast FBCH                                                                              Broadcasts                                                                           F    16 1e-4                                                                              Fixed                                                                              GLPT                                         Broadcast                                                                              fast-       kbit/                                                    Channel  changing    s                                                                 system                                                                        information                                                          Slow SBCH                                                                              Broadcasts                                                                           F    16 1e-7                                                                              Fixed                                                                              GLPT                                         Broadcast                                                                              paging      kbit/                                                    Channel  messages to s                                                                 FSUs and                                                                      slow-                                                                         changing                                                                      system                                                                        information                                                          Access                                                                             AXCH                                                                              For initial                                                                          R    32 1e-7                                                                              Controlled                                                                         LAXP                                         Channels                                                                           (i) access      kbit/  by APC                                                                             T(i)                                                  attempts by s                                                                 FSUs                                                                 Control                                                                            CTCH                                                                              For    F    32 1e-7                                                                              Fixed                                                                              GLPT                                         Channels                                                                           (i) granting    kbit/                                                             access      s                                                        Assigned Channels                                                             16   TRCH/                                                                             General                                                                              F/R  16 1e-4                                                                              Controlled                                                                         F-                                           kbit/s                                                                             16  POTS use    kbit/  by APC                                                                             GLPT                                         POTS                 s           R-                                                                            ASPT                                         32   TRCH/                                                                             General                                                                              F/R  32 1e-4                                                                              Controlled                                                                         F-                                           kbit/s                                                                             32  POTS use    kbit/  by APC                                                                             GLPT                                         POTS                 s           R-                                                                            ASPT                                         64   TRCH/                                                                             POTS use                                                                             F/R  64 1e-4                                                                              Controlled                                                                         F-                                           kbit/s                                                                             64N for in-band kbit/  by APC                                                                             GLPT                                         POTS     modems/fax  s           R-                                                                            ASPT                                         Traffic                                                                            TRCH/                                                                             ISDN B F/R  64 1e-7                                                                              Controlled                                                                         F-                                           channel @                                                                          64L channel or  kbit/  by APC                                                                             GLPT                                         64       LL          s           R-                                           kbit/s-                          ASPT                                         low                                                                           BER                                                                           D    TRCH/                                                                             ISDN D F/R  16 1e-7                                                                              Controlled                                                                         F-                                           channel                                                                            16L channel     kbit/  by APC                                                                             GLPT                                                              s           R-                                                                            ASPT                                         Order                                                                              OW  assigned                                                                             F/R  32 1e-7                                                                              Controlled                                                                         F-                                           wire     signaling   kbit/  by APC                                                                             GLPT                                         channel  channel     s           R-                                                                            ASPT                                         APC  APC carries                                                                              F/R  64 2e-1                                                                              Controlled                                                                         F-                                           channel  APC         kbit/  by APC                                                                             GLPT                                                  commands    s           R-                                                                            ASPT                                         __________________________________________________________________________

The APC data is sent at 64 kbit/sec. The APC logical channel is not FECcoded to avoid delay and is transmitted at a low power level to minimizecapacity used for APC. Alternatively, the APC and order wire (OW) datamay be separately modulated using complex spreading code sequences, orthey may be time division multiplexed with a 16 kbit/s traffic channel.

The Spreading Codes

The CDMA code generators used to encode the logical channels of thepresent invention employ Linear Shift Registers (LSRs) with feedbacklogic which is a method well known in the art. The code generators ofthe present embodiment of the invention generate 64 synchronous uniquesequences. Each RF communication channel uses a pair of these sequencesfor complex spreading (in-phase and quadrature) of the logical channels,so the generator gives 32 complex spreading sequences. The sequences aregenerated by a single seed which is initially loaded into a shiftregister circuit.

The Generation of Spreading Code Sequences and Seed Selection

The spreading code period of the present invention is defined as aninteger multiple of the symbol duration, and the beginning of the codeperiod is also the beginning of the symbol. The relation betweenbandwidths and the symbol lengths chosen for the exemplary embodiment ofthe present invention is:

    ______________________________________                                        BW (MHZ)      L(chips/symbol)                                                 ______________________________________                                        7              91                                                             10            130                                                             10.5          133                                                             14            182                                                             15            195                                                             ______________________________________                                    

The spreading code length is also a multiple of 64 and of 96 for ISDNframe support. The spreading code is a sequence of symbols, called chipsor chip values. The general methods of generating pseudorandom sequencesusing Galois Field mathematics is known to those skilled in the art;hoever, the inventor has derived a unique set, or family, of codesequences for the present invention. First, the length of the linearfeedback shift register to generate a code sequence is chosen, and theinitial value of the register is called a "seed". Second, the constraintis imposed that no code sequence generated by a code seed can be acyclic shift of another code sequence generated by the same code seed.Finally, no code sequence generated from one seed can be a cyclic shiftof a code sequence generated by another seed.

The inventor has determined that the spreading code length of chipvalues of the present invention is:

    128×233415=29877120                                  (1)

The spreading codes are generated by combining a linear sequence ofperiod 233415 and a nonlinear sequence of period 128

The nonlinear sequence of length 128 is implemented as a fixed sequenceloaded into a shift register with a feed-back connection. The fixedsequence can be generated by an m-sequence of length 127 padded with anextra logic 0, 1, or random value as is well known in the art.

The linear sequence of length L=233415 is generated using a linearfeedback shift register (LFSR) circuit with 36 stages. The feedbackconnections correspond to a irreducible polynomial h(n) of degree 36.The polynomial h(X) chosen by the inventor for the exemplary embodimentof the present invention is

    h(x)=x.sup.36 +x.sup.35 +x.sup.30 +x.sup.28 +x.sup.26 +x.sup.25 +x.sup.22 +x.sup.20 +x.sup.19 +x.sup.17 +x.sup.16 +x.sup.15 +x.sup.14 +x.sup.12 +x.sup.11 +x.sup.9 +x.sup.8 +x.sup.4 +x.sup.3 +x.sup.2 +1 (2)

A group of "seed" values for a LFSR representing the polynomial h(x) ofequation (2) which generates code sequences that are nearly orthogonalwith each other is determined. The first requirement of the seed valuesis that the seed values do not generate two code sequences which aresimply cyclic shifts of each other.

The present invention includes a method to increase the number ofavailable seeds for use in a CDMA communication system by recognizingthat certain cyclic shifts of the previously determined code sequencesmay be used simultaneously. The round trip delay for the cell sizes andbandwidths of the present invention are less than 3000 chips. In oneembodiment of the present invention, sufficiently separated cyclicshifts of a sequence can be used within the same cell without causingambiguity for a receiver attempting to determine the code sequence. Thismethod enlarges the set of sequences available for use.

By implementing the tests previously described, a total of 3879 primaryseeds were determined by the inventor through numerical computation.These seeds are given mathematically as

    d.sup.n modulo h(x)                                        (3)

where 3879 values of n are listed in the appendix, with d=(00, . . .00111).

When all primary seeds are known, all secondary seeds of the presentinvention are derived from the primary seeds by shifting them multiplesof 4095 chips modulo h(x). Once a family of seed values is determined,these values are stored in memory and assigned to logical channels asnecessary. Once assigned, the initial seed value is simply loaded intoLFSR to produce the required spreading-code sequence associated with theseed value.

Epoch and Sub-epoch Structures

The long complex spreading codes used for the system of the currentinvention have a number of chips after which the code repeats. Therepetition period of the spreading sequence is called an epoch. To mapthe logical channels to CDMA spreading codes, the present invention usesan Epoch and Sub-epoch structure. The code period for the CDMA spreadingcode to modulate logical channels is 29877120 chips/code period which isthe same number of chips for all bandwidths. The code period is theepoch of the present invention, and the Table 2 defines the epochduration for the supported chip rates. In addition, two sub-epochs aredefined over the spreading code epoch and are 233415 chips and 128 chipslong.

The 233415 chip sub-epoch is referred to as a long sub-epoch, and isused for synchronizing events on the RF communication interface such asencryption key switching and changing from global to assigned codes. The128 chip short epoch is defined for use as an additional timingreference. The highest symbol rate used with a single CDMA code is 64ksym/sec. There is always an integer number of chips in a symbolduration for the supported symbol rates 64, 32, 16, and 8 ksym/s.

                  TABLE 2                                                         ______________________________________                                        Bandwidths, Chip Rates, and Epochs                                                             number of                                                                              128 chip                                                                             233415 chip                                         Chip Rate,                                                                              chips in a                                                                             sub-epoch                                                                            sub-epoc                                                                              Epoch                                Bandwidth                                                                            Complex   64 kbit/sec                                                                            duration*                                                                            duration                                                                              duration                             (MHz)  (Mchip/sec)                                                                             symbol   (μs)                                                                              (ms)    (sec)                                ______________________________________                                        7      5.824      91      21.978 40.078  5.130                                10     8.320     130      15.385 28.055  3.591                                10.5   8.512     133      15.038 27.422  3.510                                14     11.648    182      10.989 20.039  2.565                                15     12.480    195      10.256 18.703  2.394                                ______________________________________                                         *numbers in these columns are rounded to 5 digits.                       

Cyclic sequences of the prior art are generated using linear feedbackshift register (LFSR) circuits. This method, however, does not generatesequences of even length. One embodiment of the spreading code sequencegenerator using the code seeds generated previously is shown in FIG. 2a,FIG. 2b, and FIG. 2c. The exemplary system uses a 36 stage LFSR 201 togenerate a sequence of period N'=233415=3³ ×5×7×13×19, which is C_(o) inFIG. 2a. In the FIGS. 2a, 2b, and 2c the symbol ⊕ represents a binaryaddition (EXCLUSIVE-OR). A sequence generator designed as abovegenerates the in-phase and quadrature parts of a set of complexsequences. The tap connections and initial state of the 36 stage LFSRdetermine the sequence generated by this circuit. The tap coefficientsof the 36 stage LFSR are determined such that the resulting sequenceshave the period 233415. Note that the tap connections shown in FIG. 2acorrespond to the polynomial given in equation (2). Each resultingsequence is then overlaid by binary addition with the 128 lengthsequence C* to obtain the epoch period 29877120.

FIG. 2b shows a Feed Forward (FF) circuit 202 which is used in the codegenerator. The signal X[n-1] is output of the chip delay 211, and theinput of the chip delay 211 is X[n]. The code chip C[n] is formed by thelogical adder 212 for the input X[n] and X[n-1]. FIG. 2c shows thecomplete spreading-code generator. From the LFSR 201, output signals gothrough a chain of up to 63 single stage FFs 203 cascaded as shown. Theoutput of each FF is overlaid with the short, even code sequence C*which has a period of 128=2⁷, the short code sequence C* is stored incode memory 222 and exhibits spectral characteristics of a pseudorandomsequence to obtain the epoch N=29877120 when combined with the sequencesprovided by the FFs 203. This sequence of 128 is determined by using anm-sequence (PN sequence) of length 127=2⁷ -1 and adding a bit-value,such as logic 0, to the sequence to increase the length to 128 chips.The even code sequence C* is input to the even code shift register 221,which is a cyclic register, that continually outputs the sequence. Theshort sequence is then combined with the long sequence using anEXCLUSIVE-OR operation 213, 214, 220.

As shown in FIG. 2c, up to 63 spreading-code sequences C_(o) through C₆₃are generated by tapping the output signals of FFs 203 and logicallyadding the short sequence C* in a binary adders 213, 214, and 220, forexample. One skilled in the art would realize that the implementation ofthe FF 203 create a cumulative delay effect for the code sequencesproduced at each FF stage in the chain. This delay is due to the nonzeroelectrical delay in the electronic components of the implementation. Thetiming problems associated with the delay can be mitigated by insertingadditional delay elements into the FF chain. An exemplary FF chain withadditional delay elements is shown in FIG. 2d.

The code-generators in the exemplary system are configured to generateeither global codes, or assigned codes. Global codes are CDMA codes thatcan be received or transmitted by all users of the system. Assignedcodes are CDMA codes that are allocated for a particular connection.When a family of sequences is generated from the same generator asdescribed, only the seed of the 36 stage LFSR is specified. Sequencesfor all the global codes, are generated using the same LFSR circuit.Therefore, once an SU has synchronized to the Global pilot signal froman RCS and knows the seed for the LFSR circuit for the Global Channelcodes, it can generate not only the pilot sequence but also all otherglobal codes used by the RCS.

The signal that is upconverted to RF is generated as follows. Thespreading sequences produced by the above shift register circuits areconverted to an antipodal sequence (0 maps into +1, 1 maps into -1). TheLogical channels are initially converted to APSK signals, which aremapped as constellation points as is well known in the art. The In-phaseand Quadrature channels of each QPSK signal form the real and imaginaryparts of the complex data value. Similarly, two spreading codes are usedto form complex spreading chip values. The complex data and complexspreading code are multiplied to produce a spread-spectrum data signal.Similarly, for despreading, the received complex data is correlated withthe conjugate of the complex spreading code to recover the data signal.

Short Codes

Short codes are used for the initial ramp-up process when an SU accessesan RCS. The period of the short codes is equal to the symbol durationand the start of each period is aligned with a symbol boundary. Both theSUs and the RCS derive the real and imaginary parts of the short codesfrom the last eight feed-forward sections of the sequence generator toproduce the global codes for that cell. Details on the implementation ofthe initial ramp-up process may be found i a U.S. patent applicationentitled "A METHOD OF CONTROLLING INITIAL POWER RAMP-UP IN CDMA SYSTEMSBY USING SHORT CODES", filed on even date herewith which is incorporatedherein by reference.

The signals represented by these short codes are known as Short AccessChannel pilots (SAXPTs)

Mapping of Logical Channels to Spreading Codes

The exact relationship between the spreading-code sequences and the CDMAlogical channels and pilot signals is documented in Table 3a and Table3b. Those signal names ending in `--CH` correspond to logical channels.Those signal names ending in `--PT` correspond to pilot signals, whichare described in detail below.

    ______________________________________                                                             Logical Channel                                          Sequence Quadrature  or Pilot Signal                                                                           Direction                                    ______________________________________                                        Table 3a Spreading code sequences and global CDMA codes                       C.sub.0  I           FBCH        Forward (F)                                  C.sub.1  Q           FBCH        F                                            C.sub.2 ⊕C*                                                                        I           GLPT        F                                            C.sub.3 ⊕C*                                                                        Q           GLPT        F                                            C.sub.4 ⊕C*                                                                        I           SBCH        F                                            C.sub.5 ⊕C*                                                                        Q           SBCH        F                                            C.sub.6 ⊕C*                                                                        I           CTCH (0)    F                                            C.sub.7 ⊕C*                                                                        Q           CTCH (0)    F                                            C.sub.8 ⊕C*                                                                        I           APCH (1)    F                                            C.sub.9 ⊕C*                                                                        Q           APCH (1)    F                                            C.sub.10 ⊕C*                                                                       I           CTCH (1)    F                                            C.sub.11 ⊕C*                                                                       Q           CTCH (1)    F                                            C.sub.12 ⊕C*                                                                       I           APCH (1)    F                                            C.sub.13 ⊕C*                                                                       Q           APCH (1)    F                                            C.sub.14 ⊕C*                                                                       I           CTCH (2)    F                                            C.sub.15 ⊕C*                                                                       Q           CTCH (2)    F                                            C.sub.16 ⊕C*                                                                       I           APCH (2)    F                                            C.sub.17 ⊕C*                                                                       Q           APCH (2)    F                                            C.sub.18 ⊕C*                                                                       I           CTCH (3)    F                                            C.sub.19 ⊕C*                                                                       Q           CTCH (3)    F                                            C.sub.20 ⊕C*                                                                       I           APCH (3)    F                                            C.sub.21 ⊕C*                                                                       Q           APCH (3)    F                                            C.sub.22 ⊕C*                                                                       I           reserved    --                                           C.sub.23 ⊕C*                                                                       Q           reserved    --                                           . . .    . . .       . . .       . . .                                        . . .    . . .       . . .       . . .                                        C.sub.40 ⊕C*                                                                       I           reserved    --                                           C.sub.41 ⊕C*                                                                       Q           reserved    --                                           C.sub.42 ⊕C*                                                                       I           AXCH(3)     Reverse (R)                                  C.sub.43 ⊕C*                                                                       Q           AXCH(3)     R                                            C.sub.44 ⊕C*                                                                       I           LAXPT(3)    R                                                                 SAXPT(3) seed                                            C.sub.45 ⊕C*                                                                       Q           LAXPT(3)    R                                                                 SAXPT(3) seed                                            C.sub.46 ⊕C*                                                                       I           AXCH(2)     R                                            C.sub.47 ⊕C*                                                                       Q           AXCH(2)     R                                            C.sub.48 ⊕C*                                                                       I           LAXPT(2)    R                                                                 SAXPT(2) seed                                            C.sub.49 ⊕C*                                                                       Q           LAXPT(2)    R                                                                 SAXPT(2) seed                                            C.sub.50 ⊕C*                                                                       I           AXCH(1)     R                                            C.sub.51 ⊕C*                                                                       Q           AXCH(1)     R                                            C.sub.52 ⊕C*                                                                       I           LAXPT(1)    R                                                                 SAXPT(1) seed                                            C.sub.53 ⊕C*                                                                       Q           LAXPT(1)    R                                                                 SAXPT(1) seed                                            C.sub.54 ⊕C*                                                                       I           AXCH(0)     R                                            C.sub.55 ⊕C*                                                                       Q           AXCH(0)     R                                            C.sub.56 ⊕C*                                                                       I           LAXPT(0)    R                                                                 SAXPT(0) seed                                            C.sub.57 ⊕C*                                                                       Q           LAXPT(0)    R                                                                 SAXPT(0) seed                                            C.sub.58 ⊕C*                                                                       I           IDLE        --                                           C.sub.59 ⊕C*                                                                       Q           IDLE        --                                           C.sub.60 ⊕C*                                                                       I           AUX         R                                            C.sub.61 ⊕C*                                                                       Q           AUX         R                                            C.sub.62 ⊕C*                                                                       I           reserved    --                                           C.sub.63 ⊕C*                                                                       Q           reserved    --                                           Table 3b: Spreading code sequences and assigned CDMA codes.                   C.sub.0 ⊕C*                                                                        I           ASPT        Reverse (R)                                  C.sub.1 ⊕C*                                                                        Q           ASPT        R                                            C.sub.2 ⊕C*                                                                        I           APCH        R                                            C.sub.3 ⊕C*                                                                        Q           APCH        R                                            C.sub.4 ⊕C*                                                                        I           OWCH        R                                            C.sub.5 ⊕C*                                                                        Q           OWCH        R                                            C.sub.6 ⊕C*                                                                        I           TRCH(0)     R                                            C.sub.7 ⊕C*                                                                        Q           TRCH(0)     R                                            C.sub.8 ⊕C*                                                                        I           TRCH(1)     R                                            C.sub.9 ⊕C*                                                                        Q           TRCH(1)     R                                            C.sub.10 ⊕C*                                                                       I           TRCH(2)     R                                            C.sub.11 ⊕C*                                                                       Q           TRCH(2)     R                                            C.sub.12 ⊕C*                                                                       I           TRCH(3)     R                                            C.sub.13 ⊕C*                                                                       Q           TRCH(3)                                                  C.sub.14 ⊕C*                                                                       I           reserved    --                                           C.sub.15 ⊕C*                                                                       Q           reserved    --                                           . . .    . . .       . . .       . . .                                        . . .    . . .       . . .       . . .                                        C.sub.44 ⊕C*                                                                       I           reserved    --                                           C.sub.45 ⊕C*                                                                       Q           reserved    --                                           C.sub.46 ⊕C*                                                                       I           TRCH(3)     Forward (F)                                  C.sub.47 ⊕C*                                                                       Q           TRCH(3)     F                                            C.sub.48 ⊕C*                                                                       I           TRCH(2)     F                                            C.sub.49 ⊕C*                                                                       Q           TRCH(2)     F                                            C.sub.50 ⊕C*                                                                       I           TRCH(1)     F                                            C.sub.51 ⊕C*                                                                       Q           TRCH(1)     F                                            C.sub.52 ⊕C*                                                                       I           TRCH(0)     F                                            C.sub.53 ⊕C*                                                                       Q           TRCH(0)     F                                            C.sub.54 ⊕C*                                                                       I           OWCH        F                                            C.sub.55 ⊕C*                                                                       Q           OWCH        F                                            C.sub.56 ⊕C*                                                                       I           APCH        F                                            C.sub.57 ⊕C*                                                                       Q           APCH        F                                            C.sub.58 ⊕C*                                                                       I           IDLE        --                                           C.sub.59 ⊕C*                                                                       Q           IDLE        --                                           C.sub.60 ⊕C*                                                                       I           reserved    --                                           C.sub.61 ⊕C*                                                                       Q           reserved    --                                           C.sub.62 ⊕C*                                                                       I           reserved    --                                           C.sub.63 ⊕C*                                                                       Q           reserved    --                                           ______________________________________                                    

Pilot Signals

As described above, the pilot signals are used for synchronization,carrier phase recovery, and for estimating the impulse response of theradio channel. The RCS 104 transmits a forward link pilot carrierreference as a complex pilot code sequence to provide a time and phasereference for all SUs 111, 112, 115, 117 and 118 in its service area.The power level of the Global Pilot (GLPT) signal is set to provideadequate coverage over the whole RCS service area, which area depends onthe cell size. With only one pilot signal in the forward link, thereduction in system capacity due to the pilot energy is negligible.

Each of the SUs 111, 112, 115, 117 and 118 transmits a pilot carrierreference as a quadrature modulated (complex-valued) pilotspreading-code sequence to provide time and phase reference to the RCSfor the reverse link. The pilot signal transmitted by the SU of oneembodiment of the invention is 6 dB lower than the power of the 32kbit/s POTS (plain old telephone service) traffic channel. The reversepilot channel is subject to APC. The reverse link pilot associated witha particular connection is called the Assigned Pilot (ASPT). Inaddition, there are pilot signals associated with access channels, andthese are called the Long Access Channel Pilots (LAXPTs). Short accesschannel pilots (SAXPTs) are also associated with the access channels andused for spreading-code acquisition and initial power ramp-up.

All pilot signals are formed from complex codes, as defined below:

    GLPT(forward)={C.sub.2 ⊕C*)+j.(C.sub.3 ⊕C*)}.{(±1)+j.(0)}

{Complex Code}.{Carrier}

The complex pilot signals are de-spread by multiplication with conjugatespreading codes: {(C₂ ⊕C*)-j.(C₃ ⊕C*)}. By contrast, traffic channelsare of the form:

    TRCH.sub.n (forward/reverse)={(C.sub.k ⊕C*)+j.(C.sub.l ⊕C*)}.{(±1)+j(±1)}

{Complex Codes}.{Data Symbol}

which thus form a constellation set at ##EQU1## radians with respect tothe pilot signal constellations.

The GLPT constellation is shown in FIG. 3a, and the TRCH_(n) trafficchannel constellation is shown in FIG. 3b.

Logical Channel Assignment of the FBCH, SBCH, and Traffic Channels

The fast broadcase channel (FBCH) is a global forward link channel usedto broadcast dynamic information about the availability of services andaccess channels (AXCHs). The messages are sent continuously, and eachmessage lasts approximately 1 ms. The FBCH message is 16 bits long,repeated continuously, and epoch aligned. The FBCH is formatted asdefined in Table 4.

                  TABLE 4                                                         ______________________________________                                        FBCH format                                                                   Bit               Definition                                                  ______________________________________                                        0                 Traffic Light 0                                             1                 Traffic Light 1                                             2                 Traffic Light 2                                             3                 Traffic Light 3                                             4-7               service indicator bits                                      8                 Traffic Light 0                                             9                 Traffic Light 1                                             10                Traffic Light 2                                             11                Traffic Light 3                                             12-15             service indicator bits                                      ______________________________________                                    

For the FBCH, bit 0 is transmitted first. A traffic light corresponds toan Access Channel (AXCH) and indicates whether the particular accesschannel is currently in use (red) or not in use (green). A logic `1`indicates that the traffic light is green, and a logic `0` indicates thetraffic light is red. The values of the traffic light bits may changefrom octet to octet, and each 16 bit message contains distinct serviceindicator bits which describe which types of service are available forthe AXCHs.

One embodiment of the present invention uses service indicator bits asfollows to indicate the availability of services or AXCHs. The serviceindicator bits {4,5,6,7,12,13,14,15} are interpreted as an unsignedbinary number, with bit 4 as the MSB and bit 15 as the LSB. Each servicetype increment has an associated nominal measure of the capacityrequired, and the FBCH continuously broadcasts the available capacity.This is scaled to have a maximum value equivalent to the largest singleservice increment possible. When an SU requires a new service or anincrease in the number of bearers), it compares the capacity required tothat indicated by the FBCH, and then considers itself blocked if thecapacity is not available. The FBCH and the traffic channels are alignedto the epoch.

Slow Broadcast Information frames contain system or other generalinformation that is available to all SUs, and Paging Information framescontain information about call requests for particular SUs. SlowBroadcast Information frames and Paging Information frames aremultiplexed together on a single logical channel which forms the SlotBroadcast Channel (SBCH). As previously defined, the code epoch is asequence of 29 877 20 chips having an epoch duration which is a functionof the chip rate defined in Table 5 below. In order to facilitate powersaving, the channel is divided into N "Sleep" Cycles, and each Cycle issubdivided into M Slots, which are 19 ms long, except for 10.5 Mhzbandwidth which has slots of 18 ms.

                  TABLE 5                                                         ______________________________________                                        SBCH Channel Format Outline                                                          Spreading                                                                              Epoch   Cycles/                                                                             Cycle  Slots/                                                                             Slot                                Bandwidth                                                                            Code Rate                                                                              Length  Epoch Length Cycle                                                                              Length                              (MHz)  (MHz)    (ms)    N     (ms)   M    (ms)                                ______________________________________                                        7.0    5.824    5130    5     1026   54   19                                  10.0   8.320    3591    3     1197   63   19                                  10.5   8.512    3510    3     1170   65   18                                  14.0   11.648   2565    3      855   45   19                                  15.0   12.480   2394    2     1197   63   19                                  ______________________________________                                    

Sleep Cycle Slot #1 is always used for slow broadcast information. Slots#2 to #M-1 are used for paging groups unless extended slow broadcastinformation is inserted. The pattern of cycles and slots in oneembodiment of the present invention run continuously at 16 kbit/s.

Within each Sleep Cycle the SU may power-up the receiver and re-acquirepilot code to achieve carrier lock to a sufficient precision forsatisfactory demodulation and Viterbi decoding. This settling time maybe up to 3 Slots in duration. For example, an SU assigned to Slot #7 maypower up the Receiver at the start of Slot #4. Having monitored its Slotthe SU either recognizes its Paging Address and initiates an accessrequest, or fails to recognize its Paging Address in which case itreverts to the Sleep mode.

Spreading code Tracking and AMF Detection in Multipath Channels

Spreading code Tracking

Three CDMA spreading-code tracking methods in multipath fadingenvironments are described which track the code phase of a receivedmultipath spread-spectrum signal. The first method uses the prior arttracking circuit which simply tracks the spreading code phase of thedetector having the highest output signal value, the second method usesa tracking circuit that tracks the median value of the code phase of thegroup of multipath signals, and the third method of the presentinvention, is the centroid tracking circuit which tracks the code-phaseof an optimized, least mean squared weighted average of the multipathsignal components. The following describes the algorithms by which thespreading code phase of the received CDMA signal is tracked.

A tracking circuit has operating characteristics that reveal therelationship between the time error and the control voltage that drivesa Voltage Controlled Oscillator (VCO) of a spreading-code phase trackingcircuit. When there is a positive timing error, the exemplary trackingcircuit generates a negative control voltage to offset the timing error.When there is a negative timing error, the exemplary tracking circuitgenerates a positive control voltage to offset the timing error. Whenthe tracking circuit generates a zero value, this value corresponds tothe perfect time alignment called the `lock-point`. FIG. 3c shows thebasic tracking circuit. Received signal r(t) is applied to matchedfilter 301, which correlates r(t) with a local code-sequence c(t)generated by Code Generator 303. The output signal of the matched filterx(t) is sampled at the sampler 302 to produce samples x[nT] andx[nT+T/2]. The samples x[nT] and x[nT+T/2] are used by a trackingcircuit 304 to determine if the phase of the spreading-code c(t) of thecode generator 303 is correct. The tracking circuit 304 produces anerror signal e(t) as an input to the code generator 303. The codegenerator 303 uses this signal e(t) as an input signal to adjust thecode-phase it generates.

In a CDMA system, the signal transmitted by the reference user iswritten in the low-pass representation as ##EQU2## where c_(k)represents the spreading code coefficients, P_(Tc) (t) represents thespreading code chip waveform, and T_(c) is the chip duration. Assumingthat the reference user is not transmitting data, only the spreadingcode modulates the carrier. Referring to FIG. 3, the received signal is##EQU3##

Here, a_(i) is due to fading effect of the multipath channel on the i-thpath and τ_(i) is the random time delay associated with the same path.The receiver passes the received signal through a matched filter, whichis implemented as a correlation receiver and is described below. Thisoperation is done in two steps: first the signal is passed through achip matched filter and sampled to recover the spreading code chipvalues, then this chip sequence is correlated with the locally generatedcode sequence.

FIG. 3c shows the chip matched filter 301, matched to the chip waveformP_(Tc) (t), and the sampler 302. The signal x(t) at the output terminalof the chip matched filter is ##EQU4## where

    g(t)=P.sub.Tc (t)*h.sub.R (t)                              (7)

Here, h_(R) (t) is the impulse response of the chip matched filter and^(`x`) denotes convolution. The order of the summations, can berewritten as: ##EQU5## where ##EQU6##

In the multipath channel described above, the sampler samples the outputsignal of the matched filter to produce x(nT) at the maximum power levelpoints of g(t). In practice, however, the waveform g(t) is oftenseverely distorted because of the effect of the multipath signalreception, and a perfect time alignment of the signals is not available.

When the multipath in the channel is negligible and a perfect estimateof the timing is available, i.e., a₁ =1, τ₁ =0, and a₁ =0, i=2, . . . ,M, the received signal is r(t)=s(t). Then, with this ideal channelmodel, the output of the chip matched filter becomes ##EQU7##

When there is multipath fading, however, the received spreading codechip value waveform is distorted, and a number of local maxima that canchange from one sampling interval to another depending on the channelcharacteristics.

For multipath fading channels with quickly changing channelcharacteristics, it is not practical to try to locate the maximum of thewaveform ƒ(t) in every chip period interval. Instead, a time referencecan be obtained from the characteristics of ƒ(t) that may not change asquickly. Three tracking methods are described based on differentcharacteristics of ƒ(t).

Prior Art Spreading-Code Tracking Method:

Prior art tracking methods include a code tracking circuit in which thereceiver attempts to determine where the maximum matched filter outputvalue of the chip waveform occurs and sample the signal at that point.In multipath fading channels, however, the receiver despreading codewaveform can have a number of local maxima, especially in a mobileenvironment. If ƒ(t) represents the received signal waveform of thespreading code chip convolved with the channel impulse response, theshape of ƒ(t) and where its maximum occurs can change rather quicklymaking it impractical to track the maximum of ƒ(t).

Define τ to be the time estimate that the tracking circuit calculatesduring a particular sampling interval. Also, define the following errorfunction ##EQU8## The tracking circuits of the prior art calculate avalue of the input signal that minimizes the error ε. One can write##EQU9##

Assuming ƒ(τ) has a smooth shape in the values given, the value of τ forwhich ƒ(τ) is maximum minimizes the error ε, so the tracking circuittracks the maximum point of ƒ(t).

Median Weighted Value Tracking Method:

The Median Weighted Tracking Method of one embodiment of the presentinvention, minimizes the absolute weighted error, defined as ##EQU10##

This tracking method calculates the `median` signal value of ƒ(t) bycollecting information from all paths, where ƒ(τ) is as in equation (9).In a multipath fading environment, the waveform ƒ(t) can have multiplelocal maxima, but only one median.

To minimize ε, the derivative of equation (13) is taken with respect toτ and equated it to zero, which gives ##EQU11##

The value of τ that satisfies (14) is called the `median` of ƒ(t).Therefore, the Median Tracking Method of the present embodiment tracksthe median of ƒ(t). FIG. 4 shows an implementation of the trackingcircuit based on minimizing the absolute weighted error defined above.The signal x(t) and its one-half chip offset version x(t+T/2) aresampled by the analog-to-digital A/D converter 401 at a rate 1/T. Thefollowing equation determines the operating characteristic of thecircuit in FIG. 4: ##EQU12##

Tracking the median of a group of multipath signals keeps the receivedenergy of the multipath signal components equal on the early and latesides of the median point of the correct locally generatedspreading-code phase c_(n). The tracking circuit consists of an A/Dconverter 401 which samples an input signal x(t) to form the half chipoffset samples. The half chip offset samples are alternatively groupedinto even samples called an early set of samples x(nT+τ) and odd samplescalled a late set of samples x(nT+(T/2)+τ). The first correlation bankadaptive matched filter 402 multiples each early sample by thespreading-code phases c(n+1), c(n+2), . . . , c(n+L), where L is smallcompared to the code length and approximately equal to number of chipsof delay between the earliest and latest multipath signal. The output ofeach correlator is applied to a respective first sum-and-dump bank 404.The magnitudes of the output values of the L sum-and-dumps arecalculated in the calculator 406 and then summed in a summer 408 to givean output value proportional to the signal energy in the early multipathsignals. Similarly, a second correlation bank adaptive matched filter403 operates on the late samples, using code phases c(n-1), c(n-2), . .. , c(n-L), and each output signal is applied to a respectivesum-and-dump in an integrator 405. The magnitudes of the L sum-and-dumpoutputs are calculated in calculator 407 and then summed in summer 409to give a value for the late multipath signal energy. Finally, thesubtractor 410 calculates the difference and produces error signal ε(t)of the early and late signal energy values.

The tracking circuit adjusts, by means of error signal ε(τ), the locallygenerated code phases c(t) to cause the difference between the early andlate values to tend toward 0.

Centroid Tracking Method

Another spreading-code tracking circuit of one embodiment of the presentinvention is called the squared weighted tracking (or centroid) circuit.Defining τ to denote the time estimate that the tracking circuitcalculates, based on some characteristic of ƒ(t), the centroid trackingcircuit minimizes the squared weighted error defined as ##EQU13##

This function inside the integral has a quadratic form, which has aunique minimum. The value of τ that minimizes ε can be found by takingthe derivative of the above equation with respect to τ and equating tozero, which gives ##EQU14## Therefore, the value of τ that satisfies##EQU15## is the timing estimate that the tracking circuit calculates,and β is a constant value.

Based on these observations, a realization of the tracking circuitminimizing the squared weighted error is shown in FIG. 5. The followingequation determines the error signal ε(τ) of the centroid trackingcircuit: ##EQU16## The value that satisfies ε(τ)=0 is the optimizedestimate of the timing.

The early and late multipath signal energy on each side of the centroidpoint are equal. The centroid tracking circuit shown in FIG. 5 consistsof an A/D converter 501 which samples an input signal x(t), as describedabove with reference to FIG. 4 to form half chip offset samples. Thehalf chip offset samples are alternatively grouped as an early set ofsamples x(nT+τ) and a late set of samples x(nT+(T/2)+τ). The firstcorrelation bank adaptive matched filter 502 multiples each early sampleand each late sample by the positive spreading-code phases c(n-1),c(n+2), . . . , c(n+L), where L is small compared to the code length andis approximately equal to number of chips of delay between the earliestand latest multipath signal. The output signal of each correlator isapplied to a respective one of L sum-and-sump circuits of the first sumand dump bank 504. The magnitude value of the output signal produced byeach sum-and-dump circuit of the sum and dump bank 504 is calculated bythe respective calculator in the calculator bank 506 and applied to acorresponding weighting amplifier of the first weighting bank 508. Theoutput signal of each weighting amplifier represents the weighted signalenergy in a multipath component signal.

The weighted early multipath signal energy values are summed in sampleadder 510 to give an output value that is proportional to the signalenergy in the group of multipath signals corresponding to positive codephases which are the early multipath signals. Similarly, a secondcorrelation bank adaptive matched filter 503 operates on the early andlate samples, using the negative spreading-code phases c(n-1), c(n-2), .. . , c(n-L), each output signal is provided to a respectivesum-and-dump circuit of discrete integrator 505. The magnitude value ofthe L sum-and-dump output signals are calculated by the respectivecalculator of calculator bank 507 and then weighted in weighting bank509. The weighted late multipath signal energy values are summed insample adder 511 to give an energy value for the group of multipathsignal corresponding to the negative code phases which are the latemultipath signals. Finally, the subtractor 512 calculates the differenceof the early and late signal energy values to produce error sample valueε(τ).

The tracking circuit of FIG. 5 produces error signal ε(τ) which is usedto adjust the locally generated code phase c(nT) to keep the weightedaverage energy in the early and late multipath signal groups equal. Theembodiment shown uses weighting values that increase as the distancefrom the centroid increases. The signal energy in the earliest andlatest multipath signals is probably less than the multipath signalvalues near the centroid. Consequently, the difference calculated by thesubtracter 512 is more sensitive to variations in delay of the earliestand latest multipath signals.

Quadratic Detector for Tracking

In another exemplary tracking method, the tracking circuit adjustssampling phase to be "optimal" and robust to multipath. If ƒ(t)represent the received signal waveform as in equation (9) above. Theparticular method of optimizing starts with a delay locked loop with anerror signal ε(τ) that drives the loop. The function ε(τ) desirably hasonly one zero at τ=τ₀ where τ₀ is optimal. The optimal form for ε(τ) hasthe canonical form: ##EQU17## where w(t, τ) is a weighting functionrelating (f(t) to the error ε(τ), and the following holds ##EQU18##

It follows from equation (21) that w(t, τ) is equivalent to w(t-τ).Considering the slope M of the error signal in the neighborhood of alock point τ₀ : ##EQU19## where w' (t, τ) is the derivative of w(t, τ)with respect to τ, and g(t) is the average of |f(t)|².

The error ε(τ) has a deterministic part and a noise part. Let z denotethe noise component in ε(τ), then |z|² is the average noise power in theerror function ε(τ). Consequently, the optimal tracking circuitmaximizes the ratio: ##EQU20##

The implementation of the Quadratic Detector is now described. Thediscrete error value e of an error signal ε(τ) is generated byperforming the operation

    e=y.sup.T By                                               (24)

where the vector y represents the received signal components yi, i=0, 1,. . . L-1, as shown in FIG. 5b. The matrix B is an L by L matrix and theelements are determined by calculating values such that the ratio F ofequation 23 is maximized.

Determining the Minimum Value of L needed:

The value of L in the previous section determines the minimum number ofcorrelators and sum-and-dump elements. L is chosen as small as possiblewithout compromising the functionality of the tracking circuit.

The multipath characteristic of the channel is such that the receivedchip waveform |(t) is spread over QT_(c) seconds, or the multipathcomponents occupy a time period of Q chips duration. The value of Lchosen is L=Q. Q is found by measuring the particular RF channeltransmission characteristics to determine the earliest and latestmultipath component signal propagation delay, QT_(c) is the differencebetween the earliest and latest multipath component arrival time at areceiver.

The Quadratic Detector described above may be used to implement thecentroid tracking system described above with reference to FIG. 5a. Forthis implementation, the vector y is the output signal of the sum anddump circuits 504: y={f(τ-LT), f(τ-LT+T/2), f(τ-(L-1)T), ••• f(τ),f(τ+T/2), f(τ+T), ••• f(τ+LT)} and the matrix B is set forth in table 6.

                  TABLE 6                                                         ______________________________________                                        B matrix for quadratic form of Centroid Tracking System                       ______________________________________                                        L   0       0      0   0   0   0    0   0     0      0                        0   L - 1/2 0      0   0   0   0    0   0     0      0                        0   0       L - 1  0   0   0   0    0   0     0      0                        .   .       .      .   .   .   .    .   .     .      .                        .   .       .       .  .   .   .    .   .     .      .                        .   .       .       .  .   .   .    .   .     .      .                        0   0       0      0   1/2 0   0    0   0     0      0                        0   0       0      0   0   0   0    0   0     0      0                        0   0       0      0   0   0   -1/2 0   0     0      0                        .   .       .      .   .   .   .    .   .     .      .                        .   .       .      .   .   .   .     .  .     .      .                        .   .       .      .   .   .   .     .  .     .      .                        0   0       0      0   0   0   0    0   -L + 1                                                                              0      0                        0   0       0      0   0   0   0    0   0     -L + 1/2                                                                             0                        0   0       0      0   0   0   0    0   0     0      -L                       ______________________________________                                    

Adaptive Vector Correlator

An embodiment of the present invention uses an adaptive vectorcorrelator (AVC) to estimate the channel impulse response and to obtaina reference value for coherent combining of received multipath signalcomponents. The described embodiment employs an array of correlators toestimate the complex channel response affecting each multipathcomponent, then the receiver compensates for the channel response andcoherently combines the received multipath signal components. Thisapproach is referred to as maximal ratio combining.

Referring to FIG. 6, The input signal x(t) to the system is composed ofinterference noise of other message channels, multipath signals ofmessage channels, thermal noise, and multipath signals of the pilotsignal. The signal is provided to AVC 601 and which includes adespreading means 602, channel estimation means for estimating thechannel response 604, correction means for correcting a signal foreffects of the channel response 603, and adder 605 in the presentinvention. The AVC despreading means 602 is composed of multiple codecorrelators, with each correlator using a different phase of the pilotcode c(t) provided by the pilot code generator 608. The output of thisdespreading means corresponding to a noise power level if the phase ofthe local pilot code of the despreading means is not in phase with theinput code signal, or it corresponds to a received pilot signal powerlevel plus noise power level if the input pilot code and locallygenerated pilot code phases are the same. The output signals of thecorrelators of the despreading means corrected for the channel responseby the correction means 603 and are applied to the adder 605 whichcollects all multipath pilot signal power. The channel responseestimation means 604 receives the combined pilot signal and the outputsignals of the despreading means 602, and provides a channel responseestimate signal, w(t), to the correction means 603 of the AVC, and theestimate signal w(t) is also available to the adaptive matched filter(AMF) described subsequently. The output signal of the despreading means602 is also provided to the acquisition decision means 606 whichdecides, based on a particular algorithm, such as a sequentialprobability ratio test (SPRT), if the present output levels of thedespreading circuits correspond to synchronization of the locallygenerated code to the desired input code phase. If the detector finds nosynchronization, then the acquisition decision means sends a controlsignal a(t) to the local pilot code generator 608 to offset its phase byone or more chip periods. When synchronization is found, the acquisitiondecision means informs the tracking circuit 607, which achieves andmaintains a close synchronization between the received and locallygenerated code sequences.

An exemplary implementation of the Pilot AVC used to despread the pilotspreading-code is shown in FIG. 7. The described embodiment assumes thatthe input signal x(t) has been sampled with sampling period T to formx(nT+τ), and is composed of interference noise of other messagechannels, multipath signals of message channels, thermal noise, andmultipath signals of the pilot code. The signal x(nT+τ) is applied to Lcorrelators, where L is the number of code phases over which theuncertainty within the multipath signals exists. Each correlator 701,702, 703 comprises a respective multiplier 704, 705, 706, whichmultiplies the input signal with a particular phase of the Pilotspreading code signal c((n+i)T), and a sum-and-dump circuit 708, 709,710. The output signal of each multiplier 704, 705, 706 is applied to arespective sum-and-dump circuit 708, 709, 710 to perform discreteintegration. Before summing the signal energy contained in the outputsof the correlators, the AVC compensates for the channel response thecarrier phase rotation of the different multipath signals. Each outputsignal of each sum-and-dump 708, 709, 710 is multiplied by a derotationphasor [complex conjugate of ep(nT)] obtained from the digital phaselock loop (DPLL) 721. This phasor is applied to one input port of arespective multiplier 714, 715, 716 to account for the phase andfrequency offset of the carrier signal. The Pilot Rake AMF calculates,complex weighting factors, wk, k=1, . . . , L, for each multipath signalby passing the output of each multiplier 714, 715, 716 through a lowpass filter (LPF) 711, 712, 713. Each despread multipath signal ismultiplied by its corresponding weighting factor in a respectivemultiplier 717, 718, 719. The output signals of the multipliers 717,718, 719 are summed in a master adder 720, and the output signal p(nT)of the accumulator 720 consists of the combined despread multipath pilotsignals in noise. The output signal p(nT) is also applied to the DPLL721 to produce the error signal ep(nT) for tracking of the carrierphase.

FIGS. 8a and 8b show alternate embodiments of the AVC which can be usedfor detection and multipath signal component combining. The messagesignal AVCs of FIGS. 8a and 8b use the weighting factors produced by thePilot AVC to correct the message data multipath signals. The spreadingcode signal, c(nT) is the spreading sequence used by a particularmessage channel and is synchronous with the pilot spreading code signal.The value L is the number of correlators in the AVC circuit.

The circuit of FIG. 8a calculates the decision variable Z which is givenby ##EQU21## where N is the number of chips in the correlation window.Equivalently, the decision statistic is given by ##EQU22##

The alternative implementation that results from equation (26) is shownin FIG. 8b.

Referring to FIG. 8a, the input signal x(t) is sampled to form x(nT+τ),and is composed of interference noise of other message channels,multipath signals of message channels, thermal noise, and multipathsignals of the pilot code. The signal x(nT+τ) is applied to Lcorrelators, where L is the number of code phases over which theuncertainty within the multipath signals exists. Each correlator 801,802, 803 comprises a multiplier 804, 805, 806, which multiplies theinput signal by a particular phase of the message channel spreading codesignal, and a respective sum-and-sump circuit 808, 809, 810. The outputof each multiplier 804, 805, 806 is applied to a respective sum-and dumpcircuit 808, 809, 810 which performs discrete integration. Beforesumming the signal energy contained in the output signals of thecorrelators, the AVC compensates for the different multipath signals.Each despread multipath signal and its corresponding weighting factor,which is obtained from the corresponding multipath weighting factor ofthe pilot AVC, are multiplied by multiplier 817, 818, 819. The outputsignals of the multiplier 817, 818, 819. The output signals of themultipliers 817, 818, 819 are summed in a master adder 820, and theoutput signal z(nT) of the accumulator 820 consists of sampled levels ofa despread message signal in noise.

The alternative embodiment of the invention includes a newimplementation of the AVC despreading circuit for the message channelswhich performs the sum-and-dump for each multipath signal componentsimultaneously. The advantage of this circuit is that only one sum-anddump circuit and one adder is necessary. Referring to FIG. 8b, themessage code sequence generator 830 provides a message code sequence toshift register 831 of length L. The output signal of each register 832,833, 834, 835 of the shift register 831 corresponds to the message codesequence shifted in phase by one chip. The output value of each register832, 833, 834, 835 is multiplied in multipliers 836, 837, 838, 839 withthe corresponding weighting factor w_(k), k=1, . . . L obtained from thePilot AVC. The output signals of the L multipliers 836, 837, 838, 839are summed by the adding circuit 840. The adding circuit output signaland the receiver input signal x(nT+τ) are then multiplied in themultiplier 841 and integrated by the sum-and-dump circuit 842 to producemessage signal z(nT).

A third embodiment of the adaptive vector correlator is shown in FIG.8c. This embodiment uses the least mean square (LMS) statistic toimplement the vector correlator and determines the derotation factorsfor each multipath component from the received multipath signal. The AVCof FIG. 8c is similar to the exemplary implementation of the Pilot AVCused to despread the pilot spreading-code shown in FIG. 7. The digtalphase locked loop 721 is replaced by a phase locked loop 850 having avoltage controlled oscillator 851, loop filter 852, limiter 853, andimaginary component separator 854. The difference between the correcteddespread output signal dos and an ideal despread output is provided byadder 855, and the difference signal is a despread error value ide whichis further used by the derotation circuits to compensate for errors inthe derotation factors.

In a multipath signal environment, the signal energy of a transmittedsymbol is spread out over the multipath signal components. The advantageof multipath signal addition is that a substantial portion of signalenergy is recovered in an output signal from the AVC. Consequently, adetection circuit has an input signal from the AVC with a highersign-to-noise ratio (SNR), and so can detect the presence of a symbolwith a lower bit-error ration (BER). In addition, measuring the outputof the AVC is a good indication of the transmit power of thetransmitter, and a good measure of the system's interference noise.

Adaptive Matched Filter

One embodiment of the current invention includes an Adaptive MatchedFilter (AMF) to optimally combine the multipath signal components in areceived spread spectrum message signal. The AMF is a tapped delay linewhich holds shifted values of the sampled message signal and combinesthese after correcting for the channel response. The correction for thechannel response is done using the channel response estimate calculatedin the AVC which operates on the Pilot sequence signal. The outputsignal of the AMF is the combination of the multipath components whichare summed to give a maximum value. This combination corrects for thedistortion of multipath signal reception. The various messagedespreading circuits operate on this combined multipath component signalfrom the AMF.

FIG. 8d shows an exemplary embodiment of the AMF. The sampled signalfrom the A/D converter 870 is applied to the L-stage delay line 872.Each stage of this delay line 872 holds the signal corresponding to adifferent multipath signal component. Correction for the channelresponse is applied to each delayed signal component by multiplying thecomponent in the respective multiplier of multiplier bank 874 with therespective weighting factor w₁, w₂, . . . , w_(L) from the AVCcorresponding to the delayed signal component. All weighted signalcomponents are summed in the adder 876 to give the combined multipathcomponent signal y(t).

The combined multipath component signal y(t) does not include thecorrection due to phase and frequency offset of the carrier signal. Thecorrection for the phase and frequency offset of the carrier signal ismade to y(t) by multiplying y(t) with carrier phase and frequencycorrection (derotation phasor) in multiplier 878. The phase andfrequency correction is produced by the AVC as described previously.FIG. 8d shows the correction before the despreading circuits 880, butalternate embodiments of the invention can apply the correction afterthe despreading circuits.

The Radio Carrier Station (RCS)

The Radio Carrier Station (RCS) of the present invention acts as acentral interface between the SU and the remote processing controlnetwork element, such as a Radio Distribution Unit (RDU). The interfaceto the RDU of the exemplary system follows the G.704 standard and aninterface according to a modified version of DECT V5.1, but the presentinvention may support any interface that can exchange call control andtraffic channels. The RCS receives information channels from the RDUincluding call control data, and traffic channel data such as, but notlimited to, 32 kb/s ADPCM, 64 kb/s PCM, and ISDN, as well as systemconfiguration and maintenance data. The RCS also terminates the CDMAradio interface bearer channels with SUs, which channels include bothcontrol data, and traffic channel data. In response to the call controldata from either the RDU or a SU, the RCS allocates traffic channels tobearer channels on the RF communication link and establishes acommunication connection between the SU and the telephone networkthrough an RDU.

As shown in FIG. 9, the RCS receives call control and messageinformation data into the MUXs 905, 906 and 907 through interface lines901, 902 and 903. Although E1 format is shown, other similartelecommunication formats can be supported in the same manner asdescribed below. Each MUX provides a connection to the Wireless AccessController (WAX) 920 through the PCM highway 910. While the exemplarysystem shown in FIG. 1 uses an E1 Interface, it is contemplated thatother types of telephone lines which convey multiple calls may be used,for example, T1 lines or lines which interface to a Private BranchExchange (PBX).

The Wireless Access Controller (WAC) 920 is the RCS system controllerwhich manages call control functions and interconnection of data streamsbetween the MUXs 905, 906, 907 and the Modem Interface Units (MIUs) 931,932, 933. The WAC 920 also controls and monitors other RCS elements suchas the VCD 940, RF 950, and Power Amplifier 960.

A low speed bus 912 is connected to the WAC 920 for transferring controland status signals between the RF Transmitter/Receiver 950, VDC 940, RF950 and Power Amplifier 960. The controls signals are sent from the WAC920 to enable to enable or disable the RF Transmitters/Receiver 950 orPower amplifier 960, and the status signals are sent from the RFTransmitters/Receiver 950 or Power amplifier 960 to monitor the presenceof a fault condition.

The exemplary RCS contains at least one MIU 931, which is shown in FIG.10. The MIU of the exemplary embodiment includes six CDMA modems, butthe invention is not limited to this number of modems. The MIU includes:a System PCM Highway 1201 connected to each of the CDMA Modems 1210,1211, 1212, 1215 through a PCM Interface 1220; a Control Channel Bus1221 connected to MIU controller 1230 and each of the CDMA Modems 1210,1211, 1212, 1213; an MIU clock signal generator (CLK) 1231; and a modemoutput combiner 1232. The MIU provides the RCS with the followingfunctions: the MIU controller receives CDMA Channel AssignmentInstructions from the WAC and assigns a first modem to a userinformation signal which is applied to the line interface of the MUX anda second modem to receive the CDMA channel from the SU; the MIU alsocombines the CDMA Transmit Modem Data for each of the MIU CDMA modems;multiplexes I and Q transmit message data from the CDMA modems fortransmission to the VDC; receives Analog I and Q receive message datafrom the VDC; distributes the I and Q data to the CDMA modems; transmitsand receives digital AGC Data; distributes the AGC data to the CDMAmodems; and sends MIU Board Status and Maintenance Information to theWAC 920.

The MIU controller 1230 of the exemplary embodiment of the presentinvention contains one communication microprocessor 1240, such as theMC68360 "QUICC" Processor, and includes a memory 1242 having a FlashProm memory 1243 and a SRAM memory 1244. Flash Prom 1243 is provided tocontain the program code for the Microprocessors 1240, and the memory1243 is downloadable and reprogrammable to support new program versions.SRAM 1244 is provided to contain the temporary data space needed by theMC68360 Microprocessor 1240 when the MIU controller 1230 reads or writesdata to memory.

The MIU CLK circuit 1231 provides a timing signal to the MIU controller1230, and also provides a timing signal to the CDMA modems. The MIU CLKcircuit 1231 receives and is synchronized to the system clock signalwo(t). The controller clock signal generator 1213 also receives andsynchronizes to the spreading code clock signal pn(t) which isdistributed to the CDMA modems 1210, 1211, 1212, 1215 from the MUX.

The RCS of the present embodiment includes a System Modem 1210 containedon one MIU. The System Modem 1210 includes a Broadcast spreader (notshown) and a Pilot Generator (not shown). The Broadcast Modem providesthe broadcast information used by the exemplary system, and thebroadcast message data is transferred from the MIU controller 1230 tothe System Modem 1210. The System Modem also includes four additionalmodems (not shown) which are used to transmit the signals CT1 throughCT4 and AX1 through AX4. The System Modem 1210 provides unweighted I andQ Broadcast message data signals which are applied to the VDC. The VDCadds the Broadcast message data signal to the MIU CDMA Modem TransmitData of all CDMA modems 1210, 1211, 1212, 1215, and the Global Pilotsignal.

The Pilot Generator (PG) 1250 provides the Global Pilot signal which isused by the present invention, and the Global Pilot signal is providedto the CDMA modems 1210, 1211, 1212, 1215 by the MIU controller 1230.Other embodiments of the present invention, however, do not require theMIU controller to generate the Global Pilot signal, but include a GlobalPilot signal generated by any form of CDMA Code Sequence generator. Inthe described embodiment of the invention, the unweighted I and Q GlobalPilot signal is also sent to the VDC where it is assigned a weight, andadded to the MIU CDMA Modem transmit data and Broadcast message datasignal.

System timing in the exemplary RCS is derived from the E1 interface.There are four MUXs in an RCS, three of which (905, 906 and 907) areshown in FIG. 9. Two MUXs are located on each chassis. One of the twoMUXs on each chassis is designated as the master, and one of the mastersis designated as the system master. The MUX which is the system masterderives a 2.048 Mhz PCM clock signal from the E1 interface using a phaselocked loop (not shown). In turn, the system master MUX divides the2.048 Mhz PCM clock signal in frequency by 16 to derive a 128 KHzreference clock signal. The 128 KHz reference clock signal isdistributed from the MUX that is the system master to all the otherMUXs. In turn, each MUX multiplies the 128 KHz reference clock signal infrequency to synthesize the system clock signal which has a frequencythat is twice the frequency of the PN-clock signal. The MUX also dividesthe 128 KHz clock signal in frequency by 16 to generate the 8 KHz framesynch signal which is distributed to the MIUs. The system clock signalfor the exemplary embodiment has a frequency of 11.648 Mhz for a 7 MHzbandwidth CDMA channel. Each MUX also divides the system clock signal infrequency by 2 to obtain the PN-clock signal and further divides thePN-clock signal in frequency by 29 877 120 (the PN sequence length) togenerate the PN-synch signal which indicates the epoch boundaries. ThePN-synch signal from the system master MUX is also distributed to allMUXs to maintain phase alignment of the internally generated clocksignals for each MUX. The PN-synch signal and the frame synch signal arealigned. The two MUXs that are designated as the master MUXs for eachchasis then distribute both the system clock signal and the PN-clocksignal to the MIUs and the VDC.

The PCM Highway Interface 1220 connects the System PCM Highway 911 toeach CDMA Modem 1210, 1211, 1212, 1215. The WAC controller transmitsModem Control information, including traffic message control signals foreach respective user information signal, to the MIU controller 1230through the HSB 970. Each CDMA Modem 1210, 1211, 1212, 1215 receives atraffic message control signal, which includes signaling information,from the MIU. Traffic message control signals also include call control(CC) information and spreading code and despreading code sequenceinformation.

The MIU also includes the Transmit Data Combiner 1232 which addsweighted CDMA modem transmit data including In-phase (I) and Quadrature(Q) modem transmit data from the CDMA modems 1210, 1211, 1212, 1215 onthe MIU. The I modem transmit data is added separately from the Q modemtransmit data. The combined I and Q modem transmit data output signal ofthe Transmit Data Combiner 1232 is applied to the I and Q multiplexer1233 that creates a single CDMA transmit message channel composed of theI and Q modem transmit data multiplexed into a digital data stream.

The Receiver Data Input Circuit (RDI) 1234 receives the AnalogDifferential I and Q Data from the Video Distribution Circuit (VDC) 940shown in FIG. 9 and distributes Analog Differential I and Q Data to eachof the CDMA Modems 1210, 1211, 1212, 1215 of the MIU. The Automatic GainControl Distribution Circuit (AGC) 1235 receives the AGC Data signalfrom the VDC and distributes the AGC Data to each of the CDMA Modems ofthe MIU. The TRL circuit 1233 receives the Traffic lights informationand similarly distributes the Traffic light data to each of the Modems1210, 1211, 1212, 1215.

The CDMA Modem

The CDMA modem provides for generation of CDMA spreading-code sequences,synchronization between transmitter and receiver. It also provides fourfull duplex channels (TR0, TR1, TR2, TR3) programmable to 64, 32, 16,and 8 ksym/sec. each, spreading and transmission at a specific powerlevel. The CDMA modem measures the received signal strength to allowAutomatic Power Control, it generates and transmits pilot signals,encodes and decodes using the signal for forward error correction (FEC).The moden in a subscriber unit (SU) also performs transmitterspreading-code pulse shaping using an FIR filter. The CDMA modem is alsoused by the SU and, in the following discussion, those features whichare used only by the SU are distinctly pointed out. The operatingfrequencies of the CDMA modem are given in Table 7.

                  TABLE 7                                                         ______________________________________                                        Operating Frequencies                                                         Bandwidth                                                                              Chip Rate   Symbol Rate                                                                             Gain                                           (MHz)    (MHz)       (KHz)     (Chips/Symbol)                                 ______________________________________                                        7        5.824       64         91                                            10       8.320       64        130                                            10.5     8.512       64        133                                            14       11.648      64        182                                            15       12.480      64        195                                            ______________________________________                                    

Each CDMA modem 1210, 1211, 1212, 1215 of FIG. 10, and as shown in FIG.11, is composed of a transmit section 1301 and a receive section 1302.Also included in the CDMA modem is a control center 1303 which receivescontrol messages CNTRL from the external system. These messages areused, for example, to assign particular spreading codes, to activate thespreading or despreading, or to assign transmission rates. In addition,the CDMA modem has a code generator means 1304 used to generate thevarious spreading and despreading codes used by the CDMA modem. Thetransmit section 1301 transmits the input information and controlsignals m_(i) (t), i=1, 2, . . . I as spread-spectrum processed userinformation signals sc_(j) (t), j=1, 2, . . . J. The transmit section1301 receives the global pilot code from the code generator 1304 whichis controlled by the control means 1303. The spread spectrum processeduser information signals are ultimately added with other similarlyprocessed signals and transmitted as CDMA channels over the CDMA RFforward message link, for example to the SUs. The receive section 1302receives CDMA channels as r(t) and despreads and recovers the userinformation and control signal rc_(k) (t), k=1, 2, . . . K transmittedover the CDMA RF reverse message link, for example to the RCS from theSUs.

CDMA Modem Transmitter Section

Referring to FIG. 12, the code generator means 1304 includes TransmitTiming Control Logic 1401 and spreading-code PN-Generator 1402, and theTransmit Section 1301 includes MODEM Input Signal Receiver (MISR) 1410,convolution Encoders 1411, 1412, 1413, 1414, Spreaders 1420, 1421, 1422,1423, 1424, and Combiner 1430. The Transmit Section 1301 receives themessage data channels MESSAGE, convolutionally encodes each message datachannel in the respective convolutional encoder 1411, 1412, 1413, 1414,modulates the data with random spreading-code sequence in the respectivespreader 1420, 1421, 1422, 1423, 1424, and combines modulated data fromall channels, including the pilot code received in the describedembodiment from the code generator, in the combiner 1430 to generate Iand Q components for RF transmission. The Transmitter Section 1301 ofthe present embodiment supports four (TR0, TR1, TR2, TR3) 64, 32, 16, 8Kbps programmable channels. The message channel data is a timemultiplexed signal received from the PCM highway 1201 through PCMinterface 1220 and input to the MISR 1410.

FIG. 13 illustrates the block diagram of the MISR 1410. For theexemplary embodiment of the present invention, a counter is set by the 8KHz frame synchronization signal MPCMSYNC and is incremented by 2.048MHz MPCMCLK from the timing circuit 1401. The counter output is comparedby comparator 1502 against TRCFG values corresponding to slot timelocation for TR0, TR1, TR2, TR3 message channel data; and the TRCFGvalues are received from the MIU Controller 1230 in MCTRL. Thecomparator sends a count signal to the registers 1505, 1506, 1507, 1508which clocks message channel data into buffers 1510, 1511, 1512, 1513using the TXPCNCLK timing signal derived from the system clock. Themessage data is provided from the signal MSGDAT from the PCM highwaysignal MESSAGE when enable signal TR0EN, TR1EN, TR2EN and TR3EN fromTiming Control Logic 1401 are active. In further embodiments, MESSAGEmay also include signals that enable registers depending upon anencryption rate or data rate. If the counter output is equal to one ofthe channel location addresses, the specified transmit message data inregisters 1510, 1511, 1512, 1513 are input to the convolutional encoders1411, 1412, 1413, 1414 shown in FIG. 12.

The convolutional encoder enables the use of Forward error correction(FEC) techniques, which are well known in the art. FEC techniques dependon introducing redundancy in generation of data in encoded form. Encodeddata is transmitted and the redundancy in the data enables the receiverdecoder device to detect and correct errors. One exemplary system whichuses a modem according to the present invention employs convolutionalencoding. Additional data bits are added to the data in the encodingprocess and are the coding overhead. The coding overhead is expressed asthe ratio of data bits transmitted to the tool bits (code data+redundantdata) transmitted and is called the rate "R" of the code.

Convolution codes are codes where each code bit is generated by theconvolution of each new uncoded bit with a number of previous codedbits. The total number of bits used in the encoding process is referredto as the constraint length, "K", of the code. In convolution coding,data is clocked into a shift register of K bits length so that anincoming bit is clocked into the register, and it and the existing K-1bits are convolutionally encoded to create a new symbol. The convolutionprocess consists of creating a symbol consisting of a module-2 sum of acertain pattern of available bits, always including the first bit andthe last bit in at least one of the symbols.

FIG. 14 shows the block diagram of K=7, R=1/2 convolution encodersuitable for use as the encoder 1411 shown in FIG. 12. This circuitencodes the TR0 Channel as used in one embodiment of the presentinvention. Seven-bit Register 1601 with stages Q1 through Q7 uses thesignal TXPNCLK to clock in TR0 data when the TR0EN signal is asserted.The output value of stages Q1, Q2, Q3, Q4, Q6, and Q7 are each combinedusing EXCLUSIVE-OR Logic 1602, 1603 to produce respective I and Qchannel FEC data for the TR0 channel FECTR0DI and FECTR0DQ.

Two output symbol streams FECTR0DI and FECTR0DQ are generated. TheFECTR0DI symbol stream is generated by EXCLUSIVE OR Logic 1602 of shiftregister outputs corresponding to bits 6, 5, 4.3, and 0, (Octal 171) andis designed as In phase component "I" of the transmit message channeldata. The symbol stream FECTR0DQ is likewise generated by EXCLUSIVE-ORlogic 1603 of shift register outputs from bits 6, 4, 3, 1 and 0, (Octal133) and is designated as Quadrature component "Q" of the transmitmessage channel data. Two symbols are transmitted to represent a singleencoded bit creating the redundancy necessary to enable error correctionto take place on the receiving end.

Referring to FIG. 14, the shift enable clock signal for the transmitmessage channel data is generated by the Control Timing Logic 1401. Theconvolutionally encoded transmit message channel output data for eachchannel is applied to the respective spreader 1420, 1421, 1422, 1423,1424 which multiplies the transmit message channel data by itspreassigned spreading-code sequence from code generator 1402. Thisspreading-code sequence is generated by control 1303 as previouslydescribed, and is called a random pseudonoise signature sequence(PN-code).

The output signal of each spreader 1420, 1421, 1422, 1423, 1424 is aspread transmit data channel. The operation of the spreader is asfollows: the spreading of channel output (I+jQ) multiplied by a randomsequence (PNI+jPNQ) yields the In-phase component I of the result beingcomposed of (I xor PNI) and (-Q xor PNQ). Quadrature component Q of theresult is (Q xor PNI) and (I xor PNQ). Since there is no channel datainput to the pilot channel logic (I=1, Q values are prohibited), thespread output signal for pilot channels yields the respective sequencesPNI for I component and PNQ for Q component.

The combiner 1430 receives the I and Q spread transmit data channels andcombines the channels into an I modem transmit data (TXIDAT) and Q modemtransmit data (TXQDAT) signals. The I-spread transmit data and the Qspread transmit data are added separately.

For an SU, the CDMA modem Transmit Section 1301 includes the FIR filtersto receive the I and Q channels from the combiner to provide pulseshaping, close-in spectral control and x / sin (x) correction on thetransmitted signal. Separate but identical FIR filters (not shown)receive the I and Q spread transmit data streams at the chipping rate,and the output signal of each of the filters is at twice the chippingrate. The FIR filters are 28 tap even symmetrical filters, whichupsample (interpolate) by 2. The upsampling occurs before the filtering,so that 28 taps refers to 28 taps at twice the chipping rate, and theupsampling is accomplished by setting every other sample a zero.Exemplary coefficients are shown in Table 8.

                                      TABLE 8                                     __________________________________________________________________________    Coefficient Values                                                            __________________________________________________________________________    Coeff.No.:                                                                         0  1  2  3  4 5  6  7 8 9  10 11 12 13                                   __________________________________________________________________________    Value:                                                                             3  -11                                                                              -34                                                                              -22                                                                              19                                                                              17 32 19                                                                              52                                                                              24 94 -31                                                                              277                                                                              468                                  __________________________________________________________________________    Coeff.No.                                                                          14 15 16 17 18 19 20 21 22 24 25 26 27                                   __________________________________________________________________________    Value                                                                              277                                                                              -31                                                                              -94                                                                              24 52 -19                                                                              -32                                                                              17 19 -22                                                                              -34                                                                              -11                                                                              3                                    __________________________________________________________________________

CDMA Modem Receiver Section

Referring to FIGS. 9 and 10, the RF receiver 950 of the presentembodiment accepts analog input I and Q CDMA channels, which aretransmitted to the CDMA modems 1210, 1211, 1212, 1215 through the MIUs931, 932, 933 from the VDC 940. These I and Q CMDA channel signals aresampled by the CDMA modem receive section 1302 (shown in FIG. 11) andconverted to I and Q digital receive message signal using an Analog toDigital (A/D) converter 1730 of FIG. 15. The sampling rate of the A/Dconverter of the exemplary embodiment of the present invention isequivalent to the despreading code rate. The I and Q digital receivemessage signals are then despread with correlators using six differentcomplex despreading code sequences corresponding to the spreading codesequences of the four channels (TR0, TR1, TR2, TR3), APC information andthe pilot code.

Time synchronization of the receiver to the received signal is separatedinto two phases; there is an initial acquisition phase and then atracking phase after the signal timing has been acquired. The initialacquisition is done by sliding the locally generated pilot code sequencerelative to the received signal and comparing the output signal of thepilot despreader to a threshold. The method used is called sequentialsearch. Two thresholds (match and dismiss) are calculated from theauxiliary despreader. Once the signal is acquired, the search process isstopped and tracking begins. The tracking maintains the code generator1304 (shown in FIGS. 11 and 15) used by the receiver in synchronizationwith the incoming signal. The tracking loop used in the Delay-LockedLoop (DLL) and is implemented in the acquisition & track 1701 and theIPM 1702 blocks of FIG. 15.

In FIG. 11, the modem controller 1303 implements the Phase Lock Loop(PLL) as a software algorithm in SW PLL logic 1724 of FIG. 15 thatcalculates the phase and frequency shift in the received signal relativeto the transmitted signal. The calculated phase shifts are used toderotate the phase shifts in rotate and combine blocks 1718, 1719, 1720,1721 of the multipath data signal for combining to produce outputsignals corresponding to receive channels TR0', TR1', TR2', TR3'. Thedata is then Viterbi decoded in Viterbi Decoders 1713, 1714, 1715, 1716to remove the convolutional encoding in each of the received messagechannels.

FIG. 15 indicates that the Code Generator 1304 provides the codesequences Pn_(i) (t), I=1, 2, . . . I used by the receive channeldespreaders 1703, 1704, 1705, 1706, 1707, 1708, 1709. The code sequencesgenerated are timed in response to the SYNK signal of the system clocksignal and are determined by the CCNTRL signal from the modem controller1303 shown in FIG. 11. Referring to FIG. 15, the CDMA modem receiversection 1302 includes Adaptive Matched Filter (AMF) 1710, Channeldespreaders 1703, 1704, 1705, 1706, 1707, 1708, 1709, Pilot AVC 1711,Auxiliary AVC 1712, Viterbi decoders 1713, 1714, 1715, 1716, Modemoutput interface (MOI) 1717, Rotate and Combine logic 1718, 1719, 1720,1721, AMF Weight Generator 1722, and Quantile Estimation logic 1723.

In another embodiment of the invention, the CDMA modem receiver may alsoinclude a Bit error Integrator to measure the BER of the channel andidle code insertion logic between the Viterbi decoders 1713, 1714, 1715,1716 and the MOI 1717 to insert idle codes in the event of loss of themessage data.

The Adaptive Matched Filter (AMF) 1710 resolves multipath interferenceintroduced by the air channel. The exemplary AMF 1717 uses an stagecomplex FIR filter as shown in FIG. 16. The received I and Q digitalmessage signals are received at the register 1820 from the A/D converter1730 of FIG. 15 and are multiplied in multipliers 1801, 1802, 1803,1810, 1811 by I and Q channel weights W1 to W11 received from AMF weightgenerator 1722 of FIG. 15. In the exemplary embodiment, the A/Dconverter 1730 provides the I and Q digital receive message signal dataas 2's complement 6 bits I and 6 bits Q which are clocked through an 11stage shift register 1820 responsive to the receive spreading-code clocksignal RXPNCLK. The signal RXPNCLK is generated by the timing section1401 of code generation logic 1304. Each stage of the shift register istapped and complex multiplied in the multipliers 1801, 1802, 1803, 1810,1811 by individual (6-bit I and 6-bit Q) weights to provide 11tap-weighted products which are added in adder 1830, and limited to7-bit I and 7-bit Q values.

The CDMA modem receive section 1302 (shown in FIG. 11) providesindependent channel despreaders 1703, 1704, 1705, 1706, 1707, 1708, 1709(shown in FIG. 15) for despreading the message channels. The describedembodiment despreads 7 message channels, each despreader accepting a1-bit I b 1-bit Q spreading-code signal to perform a complex correlationof this code against a 8-bit I by 8-bit Q data input. The 7 despreaderscorrespond to the 7 channels; Traffic Channel 0 (TR0'), TR1', TR2',TR3', AUX (a spare channel), Automatic Power Control (APC) and pilot(PLT).

The Pilot AVC 1711 shown in FIG. 17 receives the I and Q PilotSpreading-code sequence values PCI and PCQ into shift register 1920responsive to the timing signal RXPNCLK, and includes 11 individualdespreaders 1901 through 1911 each correlating the I and Q digitalreceive message signal data with a one chip delayed versions of the samepilot code sequence. Signals OE1, OE2, . . . OE11 are used by the modemcontrol 1303 to enable the despreading operation. The output signals ofthe despreaders are combined in combiner 1920 forming correlation signalDSPRDAT of the Pilot AVC 1711, which is received by the ACQ & Tracklogic 1701 (shown in FIG. 15), and ultimately by modem controller 1303(shown in FIG. 11). The ACQ & Track logic 1701 uses the correlationsignal value to determine if the local receiver is synchronized with itsremote transmitter.

The Auxiliary AVC 1712 also receives the I and Q digital receive messagesignal data and, in the described embodiment, includes four separatedespreaders 2001, 2002, 2003, 2004 as shown in FIG. 18. Each despreaderreceives and correlates the I and Q digital receive message data withdelayed versions of the same despreading-code sequence PARI and PARQwhich are provided by code generator 1304 input to and contained inshift register 2020. The output signals of the despreaders 2001, 2002,2003, 2004 are combined in combiner 2030 which provides noisecorrelation signal ARDSPRDAT. The auxiliary AVC despreading codesequence does not correspond to any transmit spreading-code sequence ofthe system. Signals OE1, OE2, . . . OE4 are used by the modem control1303 to enable the despreading operation. The Auxiliary AVC 1712provides a noise correlation signal ARDSPRDAT from which quantileestimates are calculated by the Quantile estimator 1733, and provides anoise level measurement to the ACQ & Track logic 1701 (shown in FIG. 15)and modem controller 1303 (shown in FIG. 11).

Each despread channel output signal corresponding to the receivedmessage channels TR0', TR1', TR2', and TR3' is input to a correspondingViterbi decoder 1713, 1714, 1715, 1716 shown in FIG. 15 which performsforward error correction on convolutionally encoded data. The Viterbidecoders of the exemplary embodiment have a constraint length of K=7 anda rate of R=1/2. The decoded despread message channel signals aretransferred from the CDMA modem to the PCM Highway 1201 through the MOI1717. The operation of the MOI is very similar to the operation of theMISR of the transmit section 1301 (shown in FIG. 11), except in reverse.

The CDMA modem receiver section 1302 implements several differentalgorithms during different phases of the acquisition, tracking anddespreading of the receive CDMA message signal.

When the received signal is momentarily lost (or severely degraded) theidle code insertion algorithm inserts idle codes in place of the lost ordegraded receive message data to prevent the user from hearing loudnoise bursts on a voice call. The idle codes are sent to the MOI 1717(shown in FIG. 15) in place of the decoded message channel output signalfrom the Viterbi decoders 1713, 1714, 1715, 1716. The idle code used foreach traffic channel is programmed by the Modem Controller 1303 bywriting the appropriate pattern IDLE to the MOI, which in the presentembodiment is a 8 bit word for a 64 kbps stream, 4 bit word for a 32kbps stream.

Modem Algorithms for Acquisition and Tracking of Received Pilot Signal

The acquisition and tracking algorithms are used by the receiver todetermine the approximate code phase of a received signal, synchronizethe local modem receiver despreaders to the incoming pilot signal, andtrack the phase of the locally generated pilot code sequence with thereceived pilot code sequence. Referring to FIGS. 11 and 15, thealgorithms are performed by the Modem controller 1303, which providesclock adjust signals to code generator 1304. These adjust signals causethe code generator for the despreaders to adjust locally generated codesequences in response to measured output values of the Pilot Rake 1711and Quantile values from quantile estimators 1723B. Quantile values arenoise statistics measured from the In-phase and Quadrature channels fromthe output values of the AUX Vector Correlator 1712 (shown in FIG. 15).Synchronization of the receiver to the received signal is separated intotwo phases; an initial acquisition phase and a tracking phase. Theinitial acquisition phase is accomplished by clocking the locallygenerated pilot spreading-code sequence at a higher or lower rate thanthe received signal's spreading code rate, sliding the locally generatedpilot spreading code sequence and performing sequential probabilityratio test (SPRT) on the output of the Pilot Vector correlator 1711. Thetracking phase maintains the locally generated spreading-code pilotsequence in synchronization with the incoming pilot signal.

The SU cold acquisition algorithm is used by the SU CDMA modem when itis first powered up, and therefore has no knowledge of the correct pilotspreading code phase, or when an SU attempts to reacquiresynchronization with the incoming pilot signal but has taken anexcessive amount of time. The cold acquisition algorithm is divided intotwo subphases. The first subphase consists of a search over the length233415 code used by the FBCCH. Once this sub-code phase is acquired, thepilot's 233415×128 length code is known to within an ambiguity of 128possible phases. The second subphase is a search of these remaining 128possible phases. In order not to lose synch with the FBCCH, the secondphase of the search it is desirable to switch back and forth betweentracking the FBCCH code and attempting acquisition of the pilot code.

The RCS acquisition of short access pilot (SAXPT) algorithm is used byan RCS CDMA modem to acquire the SAXPT pilot signal of an SU. Thealgorithm is a fast search algorithm because the SAXPT is a short codesequence of length N, where N=chips/symbol, and ranges from 45 to 195,depending on the system's bandwidth. The search cycles through allpossible phases until acquisition is complete.

The RCS acquisition of the long access pilot (LAXPT) algorithm beginsimmediately after acquisition of SAXPT. The SU's code phase is knownwithin a multiple of a symbol duration, so in the exemplary embodimentof the invention, there may be 7 to 66 phases to search within the roundtrip delay from the RCS. This bound is a result of the SU pilot signalbeing synchronized to the RCS Global pilot signal.

The re-acquisition algorithm begins when loss of code lock (LOL) occurs.A Z-search algorithm is used to speed the process on the assumption thatthe code phase has not drifted far from where it was the last time thesystem was locked. The RCS uses a maximum width of the Z-search windowsbounded by the maximum round trip propagation delay.

The Pre-Track algorithm immediately follows the acquisition orre-acquisition algorithms and immediately precedes the trackingalgorithm. Pre-track is a fixed duration period during which the receivedata provided by the modem is not considered valid. The Pre-Track periodallows other modem algorithms, such as those used by the ISW PLL 1724,ACQ & Tracking, AMF Weight GEN 1722, to prepare and adapt to the currentchannel. The Pre-track algorithm is two parts. The first part is thedelay while the code tracking loop pulls in. The second part is thedelay while the AMF tap weight calculations are performed by the AMFWeight Gen 1722 to produce settled weighting coefficients. Also in thesecond part of the Pre-Track period, the carrier tracking loop isallowed to pull in by the SE PLL 1724, and the scalar quantile estimatesare performed in the Quantile estimator 1723A.

The Tracking process is entered after the Pre-Track period ends. Thisprocess is actually a repetitive cycle and is the only process phaseduring which receive data provided by the modem may be considered valid.The following operations are performed during this phase: AMF Tap WeightUpdate, Carrier Tracking, Code Tracking, Vector Quantile Update, ScalarQuantile Update, Code Lock Check. Derotation and Symbol Summing, andPower Control (forward and reverse).

if loss of lock (LOL) is detected, the modem receiver terminates theTrack algorithm and automatically enters the reaquisition algorithm. Inthe SU, a LOL causes the transmitter to be shut down. In the RCS, LOLcauses forward power control to disabled with the transmit power heldconstant at the level immediately prior to loss of lock. It also causesthe return power control information being transmitted to assume a010101 . . . pattern, causing the SU to hold its transmit powerconstant. This can be performed using the signal lock check functionwhich generates the reset signal to the acquisition and tracking circuit1701.

Two sets of quantile statistics are maintained, one by Quantileestimator 1723B and the other by the scalar Quantile Estimator 1723A.Both are used by the modem controller 1303. The first set is the"vector" quantile information, so named because it is calculated fromthe vector of four complex values generated by the AUX AVC receiver1712. The second set is the scalar quantile information, which iscalculated from the signal complex value AUX signal that is output fromthe AUX Despreader 1707. The two sets of information represent differentsets of noise statistics used to maintain a pre-determined Probabilityof False Alarm (P_(fa)). The vector quantile data is used by theacquisition and reaquisition algorithms implemented by the modemcontroller 1303 to determine the presence of a received signal in noise,and the scalar quantile information is used by the code lock checkalgorithm.

For both the vector and scalar cases, quantile information consists ofcalculated values of lambda0 through lambda2, which are boundary valuesused to estimate the probability distribution function (p.d.f.) of thedespread received signal and determine whether the modem is locked tothe PN code. The Aux₋₋ Power value used in the following C-subroutine isthe magnitude squared of the AUX signal output of the scalar correlatorarray for the scalar quantiles, and the sum of the magnitudes squaredfor the vector case. In both cases the quantiles are then calculatedusing the following C-subroutine:

for (n=0; n<3; n++) {lambda [n]+=(lambda [n]<Aux₋₋ Power)?CG[n]:GM[n];}

where CG[n] are positive constants and GM[n] are negative constants(different values are used for scalar and vector quantiles).

During the acquisition phase, the search of the incoming pilot signalwith the locally generally pilot code sequence employs a series ofsequential tests to determine if the locally generated pilot code hasthe correct code phase relative to the received signal. The searchalgorithms use the Sequential Probability Ratio Test (SPRT) to determinewhether the received and locally generated code sequences are in phase.The speed of acquisition is increased by the parallelism resulting fromhaving a multi-fingered receiver. For example, in the describedembodiment of the invention the main Pilot Rake 1711 has a total of 11fingers representing a total phase period of 11 chip periods. Foracquisition 8 separate sequential probability ratio test (SPRTs) areimplemented, with each SPRT observing a 4 chip window. Each window isoffset from the previous window by one chip period, and in a searchsequence any given code phase is covered by 4 windows. If all 8 of theSPRT tests are rejected, then the set of windows is moved by 8 chips. Ifany of the SPRT's is accepted, then the code phase of the locallygenerated pilot code sequence is adjusted to attempt to center theaccepted SPRT's phase within the Pilot AVC. It is likely that more thanone SPRT reaches the acceptance threshold at the same time. A tablelookup is used cover all 256 possible combinations of accept/reject andthe modem controller uses the information to estimate the correct centercode phase within the Pilot Rake 1711. Each SPRT is implemented asfollows (all operations occur at 64 k symbol rate): Denote the fingers'output level values as I₋₋ Finger[n] and Q₋₋ Finger[n], where n=0 . . .10 (inclusive, 0 is earliest (most advanced) finger), then the power ofeach window is: ##EQU23## To implement the SPRT's the modem controllerthen performs for each of the windows the following calculations whichare expressed as a pseudo-code subroutine:

/*find bin for Power*/ tmp=SIGMA[0]; for (k=0; k<3; k++) {if(Power>lambda [k]) tmp=SIGMA[k+1];} test₋₋ statistic+=tmp; /*updatestatistic*/ if (test₋₋ statistic>ACCEPTANCE₋₋ THRESHOLD) you've got ACQ;else if (test₋₋ statistic<DISMISSAL₋₋ THRESHOLD) {forget this codephase;} else keep trying--get more statistics;

where lambda[k] are as defined in the above section on quantileestimation, and SIGMA[k], ACCEPTANCE₋₋ THRESHOLD and DISMISSAL₋₋THRESHOLD are predetermined constants. Note that SIGMA[k] is negativefor values for low values of k, and positive for right values of k, suchthat the acceptance and dismissal thresholds can be constants ratherthan a function of how many symbols worth of data have been accumulatedin the statistic.

The modem controller determines which bin, delimited by the values oflambda[k], the Power level falls into which allows the modem controllerto develop an approximate statistic.

For the present algorithm, the control voltage is formed as ε=y^(T) By,where y is a vector formed from the complex valued output values of thePilot Vector correlator 1711, and B is a matrix consisting of theconstant values pre-determined to maximixe the operating characteristicswhile minimizing the noise as described above with reference to theQuadratic Detector.

To understand the operation of the Quadratic Detector, it is useful toconsider the following. A spread spectrum (CDMA) signal, s(t) is passedthrough a multipath channel with an impulse response h_(c) (t). Thebaseband spread signal is described by equation (27). ##EQU24## whereC_(i) is a complex spreading code symbol, p(t) is a predefined chippulse and T_(c) is the chip time spacing, where T_(c) =1/R_(c) and R_(c)is the chip rate.

The received baseband signal is represented by equation (28) ##EQU25##where q(t)=p(t)*h_(c) (t), π is an unknown delay and n(t) is additivenoise. The received signal is processed by a filter, h_(R) (t), so thewaveform, x(t), to be processed is given by equation (29). ##EQU26##where f(t)=q(t)*h_(R) (t) and z(t)=n(t)*h_(R) (t).

In the exemplary receiver, samples of the received signal are taken atthe chip rate, that is to say, 1/T_(c). These samples, x(mT_(c) +π'),are processed by an array of correlators that compute, during the r^(th)correlation period, the quantities given by equation (30) ##EQU27##

These quantities are composed of a noise component w_(k).sup.(r) and adeterministic component y_(k).sup.(r) given by equation (31).

    y.sub.k.sup.(r) =E[v.sub.k.sup.(r) ]=Lf(kT.sub.c +π'-π)(31)

In the sequel, the time index r may be suppressed for ease of writing,although it is to be noted that the function f(t) changes slowly withtime.

The samples are processed to adjust the sampling phase, π', in anoptimum fashion for further processing by the receiver, such as matchedfiltering. This adjustment is described below. To simplify therepresentation of the process, it is helpful to describe it in terms ofthe function f(t+π), where the time shift, π, is to be adjusted. It isnoted that the function f(t+π) is measured in the presence of noise.Thus, it may be problematical to adjust the phase π' based onmeasurements of the signal f(t+π). To account for the noise, thefunction v(t): v(t)=f(t)+m(t) is introduced, where the term m(t)represents a noise process. The system processor may be derived based onconsiderations of the function v(t).

The process is non-coherent and therefore is based on the envelope powerfunction |v(t+π)|². The functional e(π') given in equation (32) ishelpful for describing the process. ##EQU28## The shift parameter isadjusted for e(π')=0, which occurs when the energy on the interval(-∞,π'-π] equals that on the interval [π'-π,∞). The error characteristicis monotonic and therefore has a single zero crossing point. This is thedesirable quality of the functional. A disadvantage of the functional isthat it is ill-defined because the integrals are unbounded when noise ispresent. Nevertheless, the functional e(π') may be cast in the formgiven by equation (33). ##EQU29## where the characteristic function w(t)is equal to sgn(t), the signum function.

To optimize the characteristic function w(t), it is helpful to define afigure of merit, F, as set forth in equation (34). ##EQU30## Thenumerator of F is the numerical slope of the mean error characteristicon the interval [-T_(A),T_(A) ] surrounding the tracked value, π₀ '. Thestatistical mean is taken with respect to the noise as well as therandom channel, h_(c) (t). It is desirable to specify a statisticalcharacteristic of the channel in order to perform this statisticalaverage. For example, the channel may be modeled as a Wide SenseStationary Uncorrelated Scattering (WSSUS) channel with impulse responseh_(c) (t) and a white noise process U(t) that has an intensity functiong(t) as shown in equation (35).

    h.sub.c (t)=√g(t)U(t)                               (35)

The variance of e(π) is computed as the mean square value of thefluctuation

    e'(π)=e(π)-<e(π)>                                 (36)

where <e(π)> is the average of e(π) with respect to the noise.

Optimization of the figure of merit F with respect to the function w(t)may be carried out using well-known Variational methods of optimization.

Once the optimal w(t) is determined, the resulting processor may beapproximated accurately by a quadratic sample processor which is derivedas follows.

By the sampling theorem, the signal v(t), bandlimited to a bandwidth Wmay be expressed in terms of its samples as shown in equation (37).

    v(t)=Σv(k/W)sinc[(Wt-k)τ]                        (37)

substituting this expansion into equation (z+6) results in an infinitequadratic form in the samples v(k/W+π'-π). Making the assumption thatthe signal bandwidth equals the chip rate allows the use of a samplingscheme that is clocked by the chip clock signal to be used to obtain thesamples. These samples, v_(k) are represented by equation (38).

    v.sub.k =v(kT.sub.c +π'-π)                           (38)

This assumption leads to a simplification of the implementation. It isvalid if the aliasing error is small.

In practice, the quadratic form that is derived is truncated. An examplenormalized B matrix is given below in Table 12. For this example, anexponential delay spread profile g(t)=exp(-t/π) is assumed with π equalto one chip. An aperture parameter T_(A) equal to one and one-half chipshas also been assumed. The underlying chip pulse has a raised cosinespectrum with a 20% excess bandwidth.

                  TABLE 12                                                        ______________________________________                                        Example B matrix                                                              ______________________________________                                        0   0      0      0    0    0    0    0    0    0    0                        0   0      -0.1   0    0    0    0    0    0    0    0                        0   -0.1   0.22   0.19 -0.19                                                                              0    0    0    0    0    0                        0   0      0.19   1    0.45 -0.2 0    0    0    0    0                        0   0      -0.19  0.45 0.99 0.23 0    0    0    0    0                        0   0      0      -0.2 0.23 0    -0.18                                                                              0.17 0    0    0                        0   0      0      0    0    -0.18                                                                              -0.87                                                                              -0.42                                                                              0.18 0    0                        0   0      0      0    0    0.17 -0.42                                                                              -0.92                                                                              -0.16                                                                              0    0                        0   0      0      0    0    0    0.18 -0.16                                                                              -0.31                                                                              0    0                        0   0      0      0    0    0    0    0    0    -0.13                                                                              0                        0   0      0      0    0    0    0    0    0    0    0                        ______________________________________                                    

Code tracking is implemented via a loop phase detector that isimplemented as follows. The vector y is defined as a column vector whichrepresents the 11 complex output level values of the Pilot AVC 1711, andB denotes an 11×11 symmetric real valued coefficient matrix withpre-determined values to optimize performance with the non-coherentPilot AVC output values y. As described above, the phase detector outputis given by equation (39);

    ε=y.sup.π By                                    (39)

The following calculations are then performed to implement aproportional plus integral loop filter and the VCO:

x[n]=x[n-1]+βε

z[n]=z[n-1]+x[n]+αε

for β and α which are constants chosen from modeling the system tooptimize system performance for the particular transmission channel andapplication, and where x[n] is the loop filter's integrator output valueand z[n] is the VCO output value. The code phase adjustments are made bythe modem controller the following pseudo-code subroutine:

if (z>zmx) {delay phase 1/16 chip; z-=zmax;} else if (z<-zmax) {advancephase 1/16 chip; z+=zmax;}

A different delay phase could be used in the above pseudo-codesubroutine consistant with the present invention.

The AMF Tap-Weight Update Algorithm of the AMF Weight Gen 1722 (shown inFIG. 15) occurs periodically to de-rotate and scale the phase eachfinger value of the Pilot Rake 1711 by performing a complexmultiplication of the Pilot AVC finger value with the complex conjugateof the current output value of the carrier tracking loop and applyingthe product to a low pass filter to produce AMF tap-weight values, whichare periodically written into the AMF filters of the CDMA modem.

The Code lock check algorithm, shown in FIG. 15) is implemented by themodem controller 1303 performing SPRT operations on the output signal ofthe scalar correlator array. The SPRT technique is the same as that forthe acquisition algorithms, except that the constants are changed toincrease the probability of detection of lock.

Carrier tracking is accomplished via a second order loop that operateson the pilot output values of the scalar correlated array. The phasedetector output is the hard limited version of the quadrature componentof the product of the (complex valued) pilot output signal of the scalarcorrelated array and the VCO output signal. The loop filter is aproportional plus integral design. The VCO is a pure summation,accumulated phase error φ, which is converted to the complex phasor cosφ+j sin φ using a look-up table in memory.

The previous description of acquisition and tracking algorithm focuseson a non-coherent method because the acquisition and tracking algorithmdescribed uses non-coherent acquisition following by non-coherenttracking. This is done because, during acquisition, a coherent referenceis not available until the AMF, Pilot AVC, Aux AVC, and DPLL are in anequilibrium state. It is, however, known in the art that coherenttracking and combining is preferred because in non-coherent tracking andcombining the output phase information of each Pilot AVC finger is lost.Consequently, another embodiment of the invention employs a two stepacquisition and tracking system, in which the previously describednon-coherent acquisition and tracking algorithm is implemented first,and then the system switches to a coherent tracking method. The coherentcombining and tracking method is similar to that described previously,except that the error signal tracked is of the form:

    ε=y.sup.T Ay                                       (40)

where y is defined as a column vector which represents the 11 complexoutput level values of the Pilot AVC 1711, and A denotes an 11×11symmetric real valued coefficient matrix with pre-determined values tooptimize performance with the coherent Pilot AVC outputs y. An exemplaryA matrix is shown below. ##EQU31##

Although the invention has been described in terms of multiple exemplaryembodiments, it is understood by those skilled in the art that theinvention may be practiced with modifications to the embodiments whichare within the scope of the invention defined by the following claims.

The invention claimed is:
 1. An adaptive matched filter (AMF) forcollecting signal power of a spread data channel in a spread-spectrumcommunication system from a spread signal having a plurality ofmultipath signal components, each of the multipath signal componentshaving a carrier phase, wherein the spread signal includes a spreadpilot channel employing a first predetermined spreading code sequenceand a spread data channel employing a second predetermined spreadingcode sequence different from the first predetermined spreading codesequence, the spread pilot channel is unmodulated and the spread datachannel is data-modulated; the AMF comprising:pilot vector correlatormeans, coupled to receive the spread signal, for determining a pluralityof multipath signal weighting values from a plurality of multipathsignal carrier components of the spread pilot channel, each multipathsignal weighting value corresponding to, and derived from, a respectivemultipath signal carrier component, the pilot vector correlator meanscomprising:a) local pilot code sequence generator means for generating aplurality of local code sequences, each of the code sequences being acode phase-shifted version of the pilot spreading code sequence; b) aplurality of pilot spreading code correlators, each pilot spreading codecorrelator correlating a respective one of the local code sequences withthe spread signal, each spreading code correlator comprising i)combining means for combining the spread signal with the respective oneof the local code sequences to produce a correlated pilot signal valueand ii) accumulator means for accumulating the correlated pilot signalvalue for a predetermined period to produce a despread multipath pilotsignal component having a carrier signal phase; c) filter meansincluding a plurality of lowpass filters, wherein each one of theplurality of despread multipath pilot signal components is applied to arespective one of the plurality of low pass filters to produce arespective multipath signal weighting value corresponding to the carriersignal phase of the respective received multipath signal component;wherein, one of the plurality of despread multipath pilot signalcomponents and a respective one of the multipath signal weighting valueis applied to a respective one of a plurality of multipliers; and eachmultipath pilot signal component is multiplied by the respective one ofthe multipath signal weighting values to produce a respective scaled andphase rotated pilot signal component of a plurality of scaled and phaserotated pilot signal components having substantially equal carrierphases; and d) pilot component combining means for combining theplurality of weighted pilot signal components to produce a pilot datavalue; and local code sequence generator means for generating aplurality of local code sequences, each of the local code sequencesbeing a code phase-shifted version of the second predetermined spreadingcode sequence; data AMF means, coupled to receive the spread signal, forproviding a data value determined from the spread data channel, the dataAMF means comprising:a) a plurality of spreading code correlators fordespreading all multipath data signal components, each spreading codecorrelator correlating a respective one of the local code sequences withthe received spread signal to produce a respective despread multipathdata signal component having a carrier phase value; b) a plurality ofweighting means for scaling the respective multipath data signalcomponents in magnitude and for aligning the carrier phase value of thedespread multipath data signal component responsive to the respectivemultipath weighting value; and c) data component combining means forcombining all of the scaled and aligned multipath data signal componentsto produce the data value.
 2. The data AMF apparatus of claim 1,wherein:each of the plurality of spreading code correlators furtherincludes i) multiplication means for multiplying the spread signal witha respective one of the local code sequences to produce a correlatedsignal value and ii) accumulation means for accumulating the correlatedsignal value for a predetermined period to produce a despread multipathdata signal component having a carrier phase which corresponds to thecarrier signal phase of the respective received multipath signalcomponent; and the weighting means comprises a plurality of multipliers,each multiplier multiplying a respective one of the despread multipathdata signal components with a respective one of the multipath signalweighting values, and each multiplier producing one scaled and alignedmultipath data signal component.
 3. A pilot vector correlator apparatusfor collecting signal power of a spread pilot channel of a receivedspread signal, the spread signal having a plurality of receivedmultipath signal components and the spread pilot channel being spread bya predetermined spreading code sequence, to produce a pilot data valueand to provide a plurality of multipath signal weighting valuesdetermined from the spread pilot channel; the apparatus comprising:localpilot code sequence generator means for generating a plurality of localcode sequences, each of the local code sequences being a codephase-shifted version of the pilot spreading code sequence; a pluralityof pilot spreading code correlators, each pilot spreading codecorrelator correlating a respective one of the local code sequences withthe spread signal, each spreading code correlator comprising i) amultiplier which multiplies the spread signal by a respective one of thelocal code sequences to produce a correlated pilot signal value, and ii)accumulator means for accumulating the correlated signal for apredetermined period to produce a despread multipath pilot signalcomponent having a respective carrier signal phase value; filter meansincluding a plurality of lowpass filters, wherein each one of theplurality of despread multipath pilot signal components is applied to arespective one of the plurality of low pass filters to produce arespective one of the plurality of multipath signal weighting values,each multipath signal weighting value corresponding to a carrier signalphase value of the respective received multipath signal component;complex multiplier means for performing complex multiplication includinga plurality of complex multipliers, each complex multiplier coupled toreceive a respective one of the plurality of despread multipath pilotsignal components and the respective multipath signal weighting value,wherein each multipath pilot signal component is multiplied by therespective weighting value to produce a respective phase rotated pilotsignal component of a plurality of phase rotated pilot signal componentshaving substantially equal carrier phase values; and d) combining meansfor combining the plurality of phase rotated pilot signal components toproduce the pilot data value.
 4. The pilot vector correlator apparatusof claim 3, further comprising:a phase locked loop (PLL) which measuresa carrier phase error of the pilot data value and produces a compositecarrier phase error signal; wherein each one of the plurality ofdespread multipath pilot signal components and the respective multipathsignal weighting values is applied to a respective one of a plurality ofcomplex multipliers with the composite phase error signal, wherein eachmultipath pilot signal component is multiplied by the respectiveweighting value and the respective phase error signal to produce arespective scaled and phase rotated pilot signal component, thereby toprovide each of the plurality of scaled and phase rotated pilot signalcomponents with a substantially equal carrier phase value.
 5. A dataadaptive matched filter (AMF) apparatus for collecting signal power of areceived spread signal, the spread signal having a plurality ofmultipath signal components, to produce a despread data value, thespread signal including a spread pilot channel and the spread datachannel being spread by a predetermined spreading code sequence; thedata AMF apparatus comprising:pilot vector correlator means forreceiving the spread signal and for providing a plurality of multipathsignal weighting values determined from the spread pilot channel, eachmultipath signal weighting value corresponding to the carrier signalphase of a respective received multipath signal component; clock signalgenerator means for producing a clock signal; code sequence generatormeans for generating a predetermined code sequence signal having aplurality of code chip values and being equivalent to the predeterminedspreading code sequence of the spread data channel, said code sequencegenerator means being coupled to the clock signal generator means forsequentially providing each spreading code value responsive to the clocksignal; a data AMF comprising:a) a shift register (SR) responsive to theclock signal and having a plurality of stages including a first stageand last stage, said predetermined code sequence signal being applied tothe first stage, wherein each stage defines a respective tap, and eachtap produces a signal which corresponds to successive ones of thespreading code values; b) a plurality of signal multipliers, each signalmultiplier multiplying a tap output value by a respective one of theplurality of multipath signal weighting values to produce one respectivemultipath despreading signal value of a plurality of multipathdespreading signal values; c) combining means for combining all of theplurality of multipath despreading signal values to produce adespreading signal; d) multiplying means for multiplying the spreadsignal by the despreading signal to produce a despread data signal; ande) accumulating means for accumulating the despread data signal for apredetermined period to produce the despread data value.
 6. A method ofcollecting signal power of a spread data channel by an adaptive matchedfilter (AMF) from a spread signal having a plurality of multipath signalcomponents, each of the multipath signal components having a carrierphase value, wherein the spread signal includes a spread pilot channelemploying a first predetermined spreading code sequence and a spreaddata channel employing a second predetermined spreading code sequencedifferent from the first predetermined spreading code sequence, thespread pilot channel is unmodulated and the spread data channel isdata-modulated; the method comprising the steps of:a) determining aplurality of multipath signal weighting values from a plurality ofmultipath signal carrier components of the spread pilot channel, eachmultipath signal weighting value corresponding to, and derived from, arespective multipath signal carrier component, the determining stepfurther comprising:a1) generating a plurality of local code sequences,each of the code sequences being a code phase-shifted version of thepilot spreading code sequence; a2) correlating, by a respective one of aplurality of pilot spreading code correlators, each of the plurality oflocal code sequences with the spread signal by i) combining the spreadsignal with the local code sequence to produce a respective correlatedpilot signal value and ii) accumulating the correlated pilot signalvalue for a predetermined period to produce a despread multipath pilotsignal component having a respective carrier signal phase; a3) applyingeach one of the plurality of despread multipath pilot signal componentsto a respective one of a plurality of low pass filters to produce amultipath signal weighting value corresponding to the carrier signalphase of the respective received multipath signal component; a4)multiplying each one of the plurality of despread multipath pilot signalcomponents with the respective multipath signal weighting value to forma plurality of scaled and phase rotated pilot signal components havingsubstantially equal carrier phases; and a5) combining the plurality ofweighted pilot signal components to produce a pilot data value; and b)generating a plurality of local code sequences, each of the local codesequences being a code phase-shifted version of the second predeterminedspreading code sequence; c) correlating all multipath data signalcomponents, by each of a plurality of spreading code correlators, arespective one of the local code sequences with the received spreadsignal to produce a respective despread multipath data signal componenthaving a carrier phase value; d) modifying, by a plurality of weightingmeans, the respective multipath data signal components to scale eachcarrier phase value of the despread multipath data signal component inmagnitude and align the carrier phase value responsive to the respectivemultipath weighting value; and f) combining each scaled and aligned datasignal component to produce a data value.
 7. The method of claim 6,wherein:the correlating step c) further includes the steps ofmultiplying the spread signal with a respective one of the local codesequences to produce a correlated signal value, and accumulating thecorrelated signal value for a predetermined period to produce a despreadmultipath data signal component having a carrier phase which correspondsto the carrier signal phase of the respective received multipath signalcomponent; and the modifying step d) includes the steps of multiplying,by respective ones of a plurality of multipliers, of the despreadmultipath data signal components with a respective one of the multipathsignal weighting values, to produce a respective scaled and aligned datasignal component.
 8. A method of collecting signal power of a spreadpilot channel of a received spread signal, the spread signal having aplurality of received multipath signal components and the spread pilotchannel being spread by a predetermined spreading code sequence, toproduce a pilot data value and to provide a plurality of multipathsignal weighting values determined from the spread pilot channel, themethod comprising the steps of:a) generating a plurality of local codesequences, each of the code sequences being a code phase-shifted versionof the pilot spreading code sequence; b) correlating, by a plurality ofpilot spreading code correlators, each respective one of the local codesequences with the spread signal, each of the plurality of spreadingcode correlators multiplying the spread signal by a respective one ofthe local code sequences to produce a correlated pilot signal value andaccumulating the correlated signal values produced by each correlatorfor a predetermined period to produce a respective plurality of despreadmultipath pilot signal components having respective carrier signal phasevalues; c) filtering each one of the plurality of despread multipathpilot signal components with a respective one of a plurality of low passfilters to produce a respective one of the plurality of multipath signalweighting values, each multipath signal weighting value corresponding toa carrier signal phase value of the respective received multipath signalcomponent; d) complex multiplying, by a respective one of a plurality ofcomplex multipliers, each multipath pilot signal component by therespective weighting value to produce a respective phase rotated pilotsignal component of a plurality of phase rotated pilot signal componentshaving substantially equal carrier phase values; and e) combining theplurality of phase rotated pilot signal components to produce the pilotdata value.
 9. The method of collecting signal power of a spread pilotchannel as recited in claim 8, further comprising the steps of:f)measuring, by a phase locked loop (PLL), a carrier phase error of thepilot data value to produce a composite carrier phase error signal; andg) applying the composite phase error signal to respective ones of aplurality of complex multipliers with the plurality of despreadmultipath pilot signal components and the respective multipath signalweighting value; wherein, in the complex multiplying step d), eachmultipath pilot signal component is complex multiplied by the respectiveweighting value and the respective phase error signal to produce arespective scaled and phase rotated pilot signal component, thereby toprovide the plurality of scaled and phase rotated pilot signalcomponents with a substantially equivalent carrier phase values.